mirror of
https://github.com/espressif/esp-idf.git
synced 2026-10-01 18:50:34 +03:00
Xiao Xufeng
789ce684c9
Before: The cache won't be disabled when XIP on psram. But during flash erasing/programming, read data will be courrupt. When XIP in psram is enabled, the image is not mapped to the cache so usually there will be no flash access. The only way to read from flash is via the driver or use mmap. The driver has protection during erasing, while th mmap region not. Now: Mmap APIs provide a flag to make mmap->unmap region mutually exclusive to flash erase/programming when XIP from psram. SPI Flash write APIs will benefit from this. When the flag is used, no concurrent access to mapped region will happen while writing; otherwise the cache will be disable to avoid data corruption. Most ESP-IDF APIs calls mmap with this flag. As for users calling mmap-like APIs directly, they can choose whether to enable this by a flag. Closes https://github.com/espressif/esp-idf/issues/14897
133 lines
4.7 KiB
Plaintext
133 lines
4.7 KiB
Plaintext
/*
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* ROM function interface esp32s31.rom.spiflash.ld for esp32s31
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*
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*
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* Generated from ../../rom/target/esp32s31/interface-esp32s31.yml md5sum 0cb775308c66eebf0757e406021ad5be
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*
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* Compatible with ROM where ECO version equal or greater to 0.
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*
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* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
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*/
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/***************************************
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Group esp_flash
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***************************************/
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/* Functions */
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esp_flash_chip_driver_initialized = 0x2f800214;
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esp_flash_read_id = 0x2f800218;
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esp_flash_get_size = 0x2f80021c;
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esp_flash_erase_chip = 0x2f800220;
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esp_flash_erase_region = 0x2f800224;
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esp_flash_get_chip_write_protect = 0x2f800228;
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esp_flash_set_chip_write_protect = 0x2f80022c;
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esp_flash_get_protectable_regions = 0x2f800230;
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esp_flash_get_protected_region = 0x2f800234;
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esp_flash_set_protected_region = 0x2f800238;
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PROVIDE( esp_flash_read = 0x2f80023c );
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esp_flash_write = 0x2f800240;
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esp_flash_write_encrypted = 0x2f800244;
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esp_flash_read_encrypted = 0x2f800248;
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PROVIDE( esp_flash_get_io_mode = 0x2f80024c );
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esp_flash_set_io_mode = 0x2f800250;
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spi_flash_boot_attach = 0x2f800254;
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esp_flash_read_chip_id = 0x2f800258;
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detect_spi_flash_chip = 0x2f80025c;
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esp_flash_suspend_cmd_init = 0x2f800260;
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/* Data (.data, .bss, .rodata) */
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esp_flash_default_chip = 0x2f07ffdc;
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esp_flash_api_funcs = 0x2f07ffd8;
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/***************************************
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Group spi_flash_chips
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***************************************/
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/* Functions */
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spi_flash_chip_generic_probe = 0x2f800264;
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spi_flash_chip_generic_detect_size = 0x2f800268;
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spi_flash_chip_generic_write = 0x2f80026c;
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spi_flash_chip_generic_write_encrypted = 0x2f800270;
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spi_flash_chip_generic_set_write_protect = 0x2f800274;
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spi_flash_common_write_status_16b_wrsr = 0x2f800278;
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spi_flash_chip_generic_reset = 0x2f80027c;
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spi_flash_chip_generic_erase_chip = 0x2f800280;
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spi_flash_chip_generic_erase_sector = 0x2f800284;
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spi_flash_chip_generic_erase_block = 0x2f800288;
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spi_flash_chip_generic_page_program = 0x2f80028c;
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spi_flash_chip_generic_get_write_protect = 0x2f800290;
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spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x2f800294;
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spi_flash_chip_generic_read_reg = 0x2f800298;
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spi_flash_chip_generic_yield = 0x2f80029c;
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spi_flash_generic_wait_host_idle = 0x2f8002a0;
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spi_flash_chip_generic_wait_idle = 0x2f8002a4;
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spi_flash_chip_generic_config_host_io_mode = 0x2f8002a8;
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spi_flash_chip_generic_read = 0x2f8002ac;
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spi_flash_common_read_status_8b_rdsr2 = 0x2f8002b0;
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spi_flash_chip_generic_get_io_mode = 0x2f8002b4;
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spi_flash_common_read_status_8b_rdsr = 0x2f8002b8;
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spi_flash_common_write_status_8b_wrsr = 0x2f8002bc;
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spi_flash_common_write_status_8b_wrsr2 = 0x2f8002c0;
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spi_flash_common_set_io_mode = 0x2f8002c4;
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spi_flash_chip_generic_set_io_mode = 0x2f8002c8;
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spi_flash_chip_generic_read_unique_id = 0x2f8002cc;
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spi_flash_chip_generic_get_caps = 0x2f8002d0;
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spi_flash_chip_generic_suspend_cmd_conf = 0x2f8002d4;
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spi_flash_chip_gd_get_io_mode = 0x2f8002d8;
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spi_flash_chip_gd_probe = 0x2f8002dc;
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spi_flash_chip_gd_set_io_mode = 0x2f8002e0;
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/* Data (.data, .bss, .rodata) */
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spi_flash_chip_generic_config_data = 0x2f07ffd4;
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spi_flash_encryption = 0x2f07ffd0;
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/***************************************
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Group memspi_host
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***************************************/
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/* Functions */
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memspi_host_read_id_hs = 0x2f8002e4;
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memspi_host_read_status_hs = 0x2f8002e8;
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memspi_host_flush_cache = 0x2f8002ec;
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memspi_host_erase_chip = 0x2f8002f0;
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memspi_host_erase_sector = 0x2f8002f4;
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memspi_host_erase_block = 0x2f8002f8;
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memspi_host_program_page = 0x2f8002fc;
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memspi_host_read = 0x2f800300;
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memspi_host_set_write_protect = 0x2f800304;
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memspi_host_set_max_read_len = 0x2f800308;
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memspi_host_read_data_slicer = 0x2f80030c;
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memspi_host_write_data_slicer = 0x2f800310;
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/***************************************
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Group hal_spiflash
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***************************************/
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/* Functions */
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spi_flash_hal_poll_cmd_done = 0x2f800314;
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spi_flash_hal_device_config = 0x2f800318;
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spi_flash_hal_configure_host_io_mode = 0x2f80031c;
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spi_flash_hal_common_command = 0x2f800320;
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spi_flash_hal_read = 0x2f800324;
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spi_flash_hal_erase_chip = 0x2f800328;
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spi_flash_hal_erase_sector = 0x2f80032c;
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spi_flash_hal_erase_block = 0x2f800330;
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spi_flash_hal_program_page = 0x2f800334;
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spi_flash_hal_set_write_protect = 0x2f800338;
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spi_flash_hal_host_idle = 0x2f80033c;
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spi_flash_hal_check_status = 0x2f800340;
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spi_flash_hal_setup_read_suspend = 0x2f800344;
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spi_flash_hal_resume = 0x2f800348;
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spi_flash_hal_suspend = 0x2f80034c;
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spi_flash_encryption_hal_enable = 0x2f800350;
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spi_flash_encryption_hal_disable = 0x2f800354;
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spi_flash_encryption_hal_prepare = 0x2f800358;
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spi_flash_encryption_hal_done = 0x2f80035c;
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spi_flash_encryption_hal_destroy = 0x2f800360;
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spi_flash_encryption_hal_check = 0x2f800364;
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