Jiang Jiang Jian 0855c331d7 Merge branch 'fix/esp32c5_usj_console_stuck_v6.0' into 'release/v6.0' ...

fix(esp32c5): Do not disable UART0 sclk when USB Serial/JTAG is primary console (v6.0)

See merge request espressif/esp-idf!48874

2026-06-29 15:32:15 +08:00

..

arch

refactor: avoid function calls inside MIN/MAX macros

2025-11-18 15:18:14 +08:00

include

refactor(esp_system): ind_wdt.c refactor & code clean

2026-03-20 10:51:39 +08:00

soc

Merge branch 'fix/esp32c5_usj_console_stuck_v6.0' into 'release/v6.0'

2026-06-29 15:32:15 +08:00

CMakeLists.txt

fix(clk): 400MHz CPU should still be selectable on ESP32-P4 less than rev3

2025-11-12 22:28:03 +08:00

cpu_start.c

feat(mspi): support 120MHz flash and psram for esp32c61

2026-03-19 14:30:46 +00:00

esp_ipc_isr.c

feat(esp_system): Adds Kconfigs to place code in IRAM

2025-06-23 13:23:33 +03:00

esp_system_chip.c

refactor(uart)!: deprcated esp_rom_uart.h

2025-07-08 18:56:17 +08:00

esp_system_linux.c

refactor(system): removed esp_system from astyle ignore list and reformated it

2024-01-30 15:17:15 +08:00

image_process.c

feat(psram): xip psram c5

2024-09-03 18:17:03 +08:00

panic_handler.c

remove(esp_hw_support): Remove redundant and unsupported memprot mentions

2025-08-04 11:43:01 +05:30