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Meet Patel
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LP GPIO input, output, interrupt, and wakeup were only tested while the HP core was awake, or for wakeup alone. Output is checked with a pulse train that the peer counts before HP wakes. Releasing pad hold on wake can change a level by itself, so a single level after wake does not prove LP drove the pin during sleep. The peer arms its falling-edge counter while it still holds the pin low, so the first pulse is not missed. On P4 the edge is only visible with sleep-select left enabled, and the HP trigger is kept by returning from LP main. The edge is applied after sleep has settled. The host side drives both boards through the shared sleep helper.