Commit Graph

774 Commits

Author SHA1 Message Date
Fu Hanxi
3a3c36ac71 tests: replace CLI-dependent xfail/skipif conditions 2026-08-18 11:39:50 +02:00
Aditya Patwardhan
498784008d test(panic): fix rtc_fast_reg2 skip marker on no-PMS targets (backport v5.5)
The skipif marker on test_rtc_fast_reg2_execute_violation evaluates
config.getvalue("target"), but in CI pytest is invoked by parametrized
node-id with no --target option, so the predicate is never true and the
test is not skipped on esp32c5/esp32c6/esp32h2/esp32p4. These targets have
no PMS peripheral case for executing from RTC-fast memory, so they raise a
generic "Illegal instruction" panic instead of the "Memory protection
fault" the test expects, and fail on every run.

Replace skipif with the temp_skip marker (already done on master in
288fc561b7). The idf_pytest plugin evaluates temp_skip against the
parametrized target, so these targets are skipped correctly. esp32c3 and
esp32s2 keep running, as they do raise a real memory protection fault.

Closes IDFCI-8848
Closes IDFCI-10459

Co-authored-by: Hrushikesh Bhosale <hrushikesh.bhosale@espressif.com>
2026-08-17 14:13:16 +02:00
Fu Hanxi
b47f9850c7 ci: apply common-scripts CI refactor
Squashes these original commits for release/v5.4 backport traceability:
- 9b289dc5ad6 ci: apply idf-ci 1.x
- 381df980d57 ci: remove pip-cache and other unused jobs
- 32375a0a15e ci: apply common-scripts CI refactor
2026-08-17 14:13:15 +02:00
Song Ruo Jing
501471bf79 fix(stdio): add console input ability when selects ESP_CONSOLE_UART_CUSTOM_NUM_1 2026-07-10 11:37:44 +08:00
Aditya Patwardhan
ef0b3dd4f9 change(secure_boot): mark ECDSA based Secure Boot V2 as insecure on affected SoCs
ECDSA based Secure Boot V2 is not functional for certain input vectors on
ESP32-C5/C61/H2/P4 and on the preview targets ESP32-H4/H21. RSA based Secure
Boot V2 is the recommended scheme where the SoC supports it. This issue will be
fixed in a future hardware ECO revision; more details will be shared through the
hardware errata document.

A new hidden Kconfig option SECURE_BOOT_V2_ECDSA_INSECURE marks the affected
mass-production SoCs (ESP32-C5/C61/H2/P4). On these SoCs, when hardware Secure
Boot V2 is enabled, the ECDSA (V2) signing scheme is no longer offered by
default; it must be turned on explicitly via SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
under "Allow potentially insecure options" (CONFIG_SECURE_BOOT_INSECURE). App
signing without hardware Secure Boot is not affected. Note that ESP32-C61 has no
RSA based Secure Boot V2, so it has no Secure Boot scheme enabled by default.

The preview targets ESP32-H4 and ESP32-H21 mark ECDSA Secure Boot V2 as not
supported in their SoC capabilities instead of using the option above. As
ESP32-H4 has no other Secure Boot V2 scheme, Secure Boot is disabled entirely on
it; ESP32-H21 retains RSA based Secure Boot V2.

The security documentation keeps the ECDSA Secure Boot V2 content visible and
adds a warning describing the limitation (including that ECDSA Secure Boot V2 on
ESP32-C61 is not recommended for production). CI apps that exercise ECDSA Secure
Boot V2 on the affected SoCs set CONFIG_SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
accordingly.
2026-06-19 15:26:43 +05:30
morris
b781bc03da Merge branch 'feat/lcd_i2c_use_configurable_timeout_v5.4' into 'release/v5.4'
feat(lcd): add configurable timeout for lcd i2c panel (v5.4)

See merge request espressif/esp-idf!48665
2026-05-28 11:38:04 +08:00
Marius Vikhammer
a201b2acfe ci(panic): disable gdbstub test on esp32p4 2026-05-27 09:43:20 +08:00
Chen Chen
1beddf49cf feat(lcd): add configurable timeout for lcd i2c panel
Closes https://github.com/espressif/esp-idf/issues/18542
Closes https://github.com/espressif/esp-idf/pull/18543
2026-05-25 09:54:58 +08:00
nilesh.kale
c07e3c5b3a fix(cpu_region_protect): set DROM mask PMP entry to read-only
PMP entry 3 (SOC_DROM_MASK_HIGH, TOR mode) in the memprot path
was incorrectly granted RW permission on esp32h21 and esp32c61.
The mask ROM data region is inherently read-only; remove the W bit.

Also added necessary tests to check voilations and re-enabled
tests for ESP32P4
2026-05-11 17:03:13 +05:30
sonika.rathi
5a9539fe56 fix(fatfsgen): stabilize host read-flash after UART close in pytest 2026-04-30 15:18:57 +02:00
Alexey Lapshin
2eebcf27c6 fix(esp_gdbstub): adapt xtensa headers 2026-03-16 15:17:34 +07:00
Alexey Lapshin
cbba99bf03 feat(esp_gdbstub): support watchpoint trigger reason 2026-03-12 19:15:10 +07:00
Alexey Lapshin
c807f27bec fix(gdbstub): fix task lookup by frame 2026-03-12 19:15:10 +07:00
Alexey Lapshin
d551d86f17 fix(gdbstub): xtensa: fix FPU registers read and write
Closes https://github.com/espressif/esp-idf/issues/17944
2026-03-12 19:15:10 +07:00
Alexey Lapshin
2f856a8f88 feat(gdbstub): add f- and q-registers support 2026-03-12 19:15:09 +07:00
Alexey Lapshin
83004a3a71 feat(gdbstub): add riscv xesppie extension support 2026-03-12 19:13:57 +07:00
Evgeny Torbin
f7395255da test: format all test scripts 2026-03-11 07:34:34 +01:00
Alexey Gerenkov
a0903c46be Merge branch 'fix/coredump_test_tcb_corrupted_v5.4' into 'release/v5.4'
test(espcoredump): fix test for corrupted TCB handling in coredump (v5.4)

See merge request espressif/esp-idf!45328
2026-02-05 18:33:28 +08:00
Erhan Kurubas
252624ada0 test(panic): add retry logic to espcoredump subprocess call 2026-01-21 08:31:57 +03:00
Erhan Kurubas
993cdd19e7 test(espcoredump): fix test for corrupted TCB handling in coredump 2026-01-21 08:13:17 +03:00
Erhan Kurubas
33af9bffc4 test(panic): improve stack dump capture to return full hex content 2026-01-21 08:02:19 +03:00
Erhan Kurubas
4f9943e8e4 fix(espcoredump): prevent double exception during int_wdt panic with custom stack 2025-12-11 16:20:09 +01:00
Chen Yudong
0b5e53216a ci: rename wifi_two_dut to two_duts 2025-12-03 09:54:23 +08:00
armando
f322fb55cb change(g0): use hw_ver3 to build g0 components test app 2025-11-18 11:30:24 +08:00
Roland Dobai
dfd7fd391d Merge branch 'contrib/github_pr_17594_v5.4' into 'release/v5.4'
fix(depgraph): Add double quotes around dependency names (GitHub PR) (v5.4)

See merge request espressif/esp-idf!42493
2025-10-27 16:30:50 +01:00
Frantisek Hrbata
f5fccb7f3d fix(test_apps): reflect changes in component_deps.dot in the g1_components test
The commit 51f3c02115 ("Add quotes around node ID in dependency
graph") introduced proper quoting for node IDs in the generated dot
file. Since the dot format does not allow dashes in node names without
quoting, and dashes are used in component names, the component names in
the generated dot file are now correctly quoted. Adjust the
g1_components test to accommodate this change by stripping the quotes.

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
2025-10-15 19:31:09 +08:00
armando
a70a29b7a6 feat(p4): p4 rev3 real chip support 2025-10-13 15:24:14 +08:00
armando
b3fd689da9 feat(esp32p4): support rev3 on fpga 2025-10-13 15:24:14 +08:00
Marius Vikhammer
f9e47732aa Merge branch 'bugfix/enable_misc_test_case_v5.4' into 'release/v5.4'
ci: cleanup misc system build-test-rules (v5.4)

See merge request espressif/esp-idf!41318
2025-08-22 11:26:58 +08:00
Marius Vikhammer
75f2d74569 ci(system): enabled and cleanup misc system test-apps build-test-rules 2025-08-18 10:24:07 +08:00
Sudeep Mohanty
80ad7ec71a test(panic_handler): Added unit test to verify panic handler can halt
This test verifies that the panic handler can indeed halt when
configured to print and halt instead of rebboting.
2025-08-14 12:54:38 +02:00
Samuel Obuch
64d9fd72c6 ci: enable example tests for esp32p4 2025-07-15 21:25:14 +02:00
Samuel Obuch
d40278174d ci: use shared OpenOCD class for GDB test app 2025-07-15 21:25:14 +02:00
wanckl
ea03622621 ci(esp32c61): remove c61 support from readme on 5.4 2025-06-17 15:09:40 +08:00
Jiang Jiang Jian
ee04629723 Merge branch 'feat/some_xip_psram_related_optimisations_and_fixes_v5.4' into 'release/v5.4'
feat(esp_psram): Add some wasted XIP PSRAM memory in heap and PSRAM protection (v5.4)

See merge request espressif/esp-idf!38872
2025-05-26 19:46:08 +08:00
Mahavir Jain
e1d41ada5c test: add secure image verification case for C6/H2 2025-05-14 10:57:09 +05:30
harshal.patil
9406fde68d feat(cpu_region_protect): Enable basic memory protection for SPIRAM 2025-05-05 11:52:04 +05:30
wuzhenghui
33aca83c63 change(ci): remove esp32c5 from readme since esp32c5 skipped CI build 2025-04-25 17:13:27 +08:00
Jiang Jiang Jian
6897a7bf40 Merge branch 'ci/add_test_for_ecos_wifi_enterprise_v54' into 'release/v5.4'
ci(c2/c3): add major eco version tests(v5.4)

See merge request espressif/esp-idf!37808
2025-04-07 13:52:43 +08:00
harshal.patil
dcd80b2528 fix(examples): Example CA certs must contain the Key Usage parameter
- Example CA certificates that are used for self-signed client certificates
need to include the Key Usage parameter.
- Python3.13 changed the default context of the SSL context that is
generated using ssl.create_default_context() by enabling the VERIFY_X509_STRICT
flag by default
2025-04-03 10:51:09 +05:30
luaijun
c8508e992f ci(c2/c3): add major eco version tests 2025-03-19 18:40:21 +08:00
Sudeep Mohanty
cd887ef59a fix(panic_handler): Updated panic handler to use RTC WDT
This commit updates the following:
- Updates the panic handler to use only the RTC WDT to reset the system.
- Refactors some of the panic handler code.
- Updates Bluetooth files where in they now feed the WDTs instead of
  reconfiguring them.
- Removes some unnecessary configuration of WDTs from various files.
- Added a unit test to verify that the system does not lock up when the
  panic handler is stuck.
- Updates the memprot unit tests to work with the refactored panic
  handler.

Closes https://github.com/espressif/esp-idf/issues/15166
Closes https://github.com/espressif/esp-idf/issues/15018
Closes https://github.com/espressif/esp-idf/issues/10110
2025-03-06 09:17:26 +01:00
Jiang Jiang Jian
aa97a0fc3c Merge branch 'bugfix/fix_i2s_std_initializer_order_for_cpp_compiler_v5.4' into 'release/v5.4'
fix(i2s): fixed i2s_std initializer order for cpp compiler (v5.4)

See merge request espressif/esp-idf!37047
2025-02-21 11:48:58 +08:00
laokaiyao
1312472337 fix(i2s): fixed i2s_std initializer order for cpp compiler
Closes https://github.com/espressif/esp-idf/issues/15405
2025-02-20 21:41:33 +08:00
Martin Vychodil
fef8695c7a fix(security): Fixed ESP32S2 memory protection check for Peri1 RTCSLOW interrupt
- fixes the issue found in https://github.com/espressif/esp-idf/issues/15359
- extends debug printouts in the related tests
2025-02-19 14:25:55 +01:00
Erhan Kurubas
9f3a5eb3ab test(coredump): collect all expected uart data first, then process lazily 2025-02-03 15:06:25 +01:00
Euripedes Rocha
ca7cf4de4b fix(mqtt): Regenerate certificates for testing
- Previous fix ommited one of the client certificates by mistaque.
- This regenerates all certificates to clean that up.
2025-01-29 14:03:29 +01:00
Tomáš Rohlínek
a92d5e9358 fix(storage/fatfsgen): broken test_apps scripts for fatfsgen 2025-01-17 18:31:50 +01:00
morris
6af9dc6934 test(twai): add cxx build test 2025-01-13 10:13:56 +08:00
Roland Dobai
f6ad4d5056 Merge branch 'fix/test_idf_gdb_v5.4' into 'release/v5.4'
test(system): mark gdb test runners properly (v5.4)

See merge request espressif/esp-idf!35586
2025-01-10 18:15:32 +08:00