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54 Commits

Author SHA1 Message Date
morris
947281f046 Merge branch 'contrib/github_pr_18677_v5.3' into 'release/v5.3' 
fix(uart): fix threshold configuration loss when interrupts are disabled (v5.3)

See merge request espressif/esp-idf!50527
 2026-07-15 11:59:15 +08:00
Hu Rui
9bcf04ab89 fix(uhci): rx fsm race condition 
Closes https://github.com/espressif/esp-idf/issues/18746
 2026-07-09 19:06:08 +08:00
Abanoub Salah
9cbe2331ad uart: fix threshold configuration loss when interrupts are disabled 2026-07-08 22:09:47 +08:00
Hu Rui
80717864c2 fix(uhci): fix uhci cache issue on ESP32-P4 2026-05-08 16:39:05 +08:00
Hu Rui
8ee0fd7a02 test(uhci): enable uhci ota test on C5 and P4 2026-04-24 16:12:00 +08:00
morris
036af88e67 Merge branch 'bugfix/lp_uart_rx_iomux_pin_not_work_v5.3' into 'release/v5.3' 
fix(uart): lp uart rx iomux pin was not working as expected (v5.3)

See merge request espressif/esp-idf!47610
 2026-04-21 16:19:15 +08:00
Evgeny Torbin
59f62ad15f test: format all test scripts 2026-04-17 16:01:00 +02:00
Song Ruo Jing
f17f4c70f0 fix(uart): lp uart rx iomux pin was not working as expected 
Introduced in 8818157e42
The workaround in the commit routes the signal to LP GPIO matrix first.
When uses LP IOMUX pin as UART RX, the signal did not bypass the matrix,
which caused the issue.

This commit adds rtc_gpio_iomux_input and rtc_gpio_iomux_output APIs
to align with existing GPIO driver APIs.
 2026-04-14 20:21:00 +08:00
Song Ruo Jing
be2bb37f0e fix(uart): Avoid division by zero error when calling uart_get_baudrate 
If uart_driver_install is not called before uart_get_baudrate,
the UART port may not be ready. In such cases, the register values
cannot be read out, leading to a division by zero error in uart_ll_get_baudrate.
This commit adds a check to ensure the UART port is enabled before
attempting to read its registers.

Closes https://github.com/espressif/esp-idf/issues/17513
 2026-02-25 11:30:25 +08:00
Song Ruo Jing
f773c59e89 fix(uart): tx write bytes fails to use non-default tx fifo empty threshold 
Users may see tx write bytes fails to feed data into tx fifo in time
even if the tx fifo empty threshold has been set to a large value.
 2026-02-25 11:30:25 +08:00
Chen Chen
94f9f086f9 fix(intr_alloc): Fix ISR allocate methods in several drivers 2026-01-07 10:17:09 +08:00
Song Ruo Jing
3add145283 fix(uart): fix some uart port generate a RX BRK_DET intr on reset issue 
Issue saw on S3 UART2 and some LP_UART ports
 2025-12-08 22:13:05 +08:00
Song Ruo Jing
9dd31295a0 fix(uart): correct uart_get_tx_buffer_free_size calculation 
Modified a bit on the TX ring buffer push size logic

 Closes https://github.com/espressif/esp-idf/issues/15859
 2025-12-08 22:13:05 +08:00
Song Ruo Jing
59abd9fd51 fix(uart): fix release pin logic if switching only one pin 2025-12-08 22:13:05 +08:00
morris
2348f03d58 Merge branch 'doc/tsens_uhci_v5.3' into 'release/v5.3' 
doc: Update temperature snesor docs, remove inaccurate part, Fix uhci compiling on non-supported target (backport v5.3)

See merge request espressif/esp-idf!42468
 2025-10-21 16:45:09 +08:00
Chen Jichang
3d1a110f38 refactor(gdma): move buffer aligment to buffer mount config 2025-10-14 17:24:24 +08:00
C.S.M
b2816e228b docs(uhci): implementation for uart-dma (uhci) docs 2025-10-13 11:02:28 +08:00
C.S.M
8659c44975 feat(uhci): Add uhci (uart-dma) support on current chips 2025-08-28 18:23:23 +08:00
morris
46ac830333 Merge branch 'bugfix/lp_uart_baudrate_limitation_v5.3' into 'release/v5.3' 
fix(uart): LP UART does not have the pre-divider for its clock source (v5.3)

See merge request espressif/esp-idf!37595
 2025-05-23 17:10:39 +08:00
Song Ruo Jing
8baffe22cb fix(uart): LP UART does not have the pre-divider for its clock source 
Closes https://github.com/espressif/esp-idf/issues/15427
 2025-05-22 11:51:19 +08:00
Song Ruo Jing
84f8be2e31 refactor(uart): increase test app memory leak tolerance 2025-05-22 11:51:19 +08:00
Song Ruo Jing
501fb2fab2 fix(uart): eliminate garbled data on UART TX/RX line in sleep 2025-05-20 16:49:47 +08:00
Song Ruo Jing
752df66332 feat(uart): add pin release process to uart driver 2025-05-20 16:49:39 +08:00
Song Ruo Jing
3de0b669e7 docs(uart): improve set/get baud rate API docs 
Closes https://github.com/espressif/esp-idf/issues/15449
 2025-05-20 11:53:42 +08:00
Song Ruo Jing
96372d2091 fix(uart): fixed coverity ininitialized scalar variable in uart_tcgetattr 2025-05-20 11:52:22 +08:00
Li Shuai
44001a9d70 change(esp_hw_support): update some modules sleep retention init dependency bitmap 2025-02-13 15:35:19 +08:00
Song Ruo Jing
a1ba653952 fix(uart): allow same pin for tx and rx in uart_set_pin 
Closes https://github.com/espressif/esp-idf/issues/14787
 2025-01-10 15:14:27 +08:00
Song Ruo Jing
33935c5607 fix(uart): fix race condition with the use of UART_SELECT_READ_NOTIF 
UART_SELECT_READ_NOTIF needs to be sent after received data got processed
to avoid the potential race condition
 2025-01-08 20:47:58 +08:00
Song Ruo Jing
97ef2f36d2 fix(uart): eliminated potential glitch on TX at setup if TX signal is inversed 
Closes https://github.com/espressif/esp-idf/issues/14285
 2024-12-25 15:19:49 +08:00
Song Ruo Jing
32c17b419a fix(uart_vfs): read() now aligned to POSIX defined behavior 
- For blocking mode, block until data available
- Return with the bytes available in the file at the time,
  it should not block until reaching the requested size

And read() should not realy return on the newline character
Closes https://github.com/espressif/esp-idf/issues/14155
 2024-12-03 16:32:27 +08:00
Song Ruo Jing
d3c6c9ccb8 fix(ci): enable gpio, uart, ledc target tests on esp32p4 2024-10-23 18:01:50 +08:00
Chen Jichang
84f024478c fix(ci): rerun pre-commit to fix readme files 2024-09-27 11:12:55 +08:00
Song Ruo Jing
753fe53fab fix(uart): fix uart_config_t structure size difference in C and C++ 2024-07-31 15:15:59 +08:00
Song Ruo Jing
8b8bb72ad4 feat(uart): support uart module sleep retention on c6/h2/p4 2024-07-31 15:15:11 +08:00
laokaiyao
951bdd70a2 fix(ci): fix the readme check of c5 mp 2024-07-30 15:40:19 +08:00
Xu Si Yu
371ae9577c fix(uart): remove unnecessary wait when sending message to ring buffer 2024-07-26 11:41:36 +08:00
Michael (XIAO Xufeng)
1ca9a46737 Merge branch 'bugfix/forbid_uart_suspend_auto_lightsleep' into 'master' 
uart: Fixed issue that TX be blocked by auto-lightsleep

Closes IDF-5518

See merge request espressif/esp-idf!21719
 2024-04-10 10:49:24 +08:00
laokaiyao
65b1fd33d3 ci(esp32c5mp): disable the unsupported tests 2024-04-07 12:13:29 +08:00
Michael (XIAO Xufeng)
f251e32f48 feat(uart_test): add test case for uart tx blocked by auto-suspend 2024-04-05 03:01:24 +08:00
LiPeng
235bb6f294 fix(uart): Fixed issue that TX be blocked by auto-lightsleep 2024-04-05 03:01:24 +08:00
morris
c0289ee6eb fix(drivers): fix typos found by codespell 
codespell components/esp_driver*
 2024-03-28 10:01:27 +08:00
Song Ruo Jing
90bf2772ac fix(uart): Fix mismatch wakeup rising edges required with the threshold configured 
Closes https://github.com/espressif/esp-idf/issues/12586
 2024-03-15 16:58:33 +08:00
sonika.rathi
e162903615 fix(esp_vfs_console): add esp_vfs_console component 
move vfs_console related init steps from vfs component to new esp_vfs_console component
 2024-03-11 10:18:10 +01:00
wanlei
ee02b71f1c feat(esp32c61): introduce target esp32c61 2024-03-01 21:12:25 +08:00
gaoxu
f9109beda2 feat(uart): add HP/LP uart support on ESP32C5 2024-02-29 14:12:51 +08:00
Song Ruo Jing
5276cd4f1d refactor(uart): add support to be able to test LP_UART port 
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
 2024-02-07 14:37:48 +08:00
Cao Sen Miao
6768805d20 fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions, 
Closes https://github.com/espressif/esp-idf/issues/12958
 2024-01-18 10:51:51 +08:00
laokaiyao
96a4ead083 feat(esp32c5): support to run hello world on esp32c5 beta3 2024-01-09 13:11:11 +08:00
Cao Sen Miao
3dc76e9360 refactor(usb_serial_jtag): make usb_serial_jtag as component 2024-01-05 19:42:04 +08:00
Armando
3c5a4f9e8a ci(p4): added todo jira for disabled tests on p4 2024-01-04 09:36:38 +08:00