Commit Graph
8 Commits
Author SHA1 Message Date
Xiao Xufeng 475ec39cb4 fix(mspi): fixed possible boot failure in some builds when psram is enabled
A typical scenario is: when XIP on PSRAM enabled, compiler optimization level is Os. Under certain binary layout, boot hangs and backtrace points to `esp_sleep_config_gpio_isolate`.

The root cause is that, during PSRAM initialization, it calls esp_gpio_reserve, which happens to place before the reported function. However, after call, there is no barrier before the clock adjustment in `mspi_timing_enter_low_speed_mode`. The clock gets changed when the cache is still fetching data, resulting in the corrupted data in the end of the cache line.

This commits add spi_flash_disable_cache as a barrier to make sure the cache transactions is finished before the clock switch.
2026-05-15 17:31:37 +08:00
harshal.patil 45d5ef45a5 feat(esp_ds): Support using the AES key used by DS peripheral for encrypting params 2026-03-23 10:46:22 +05:30
Laukik Hase 68d31180f0 fix(esp_tee): Prevent IV reuse in the TEE secure storage AES-GCM service 2026-02-11 12:29:52 +05:30
Laukik Hase 1752290f02 feat(esp_tee): Migrate TEE attestation to the PSA interface 2026-01-29 11:49:15 +05:30
Laukik Hase f307e80fe2 feat(esp_tee): Enable MSPI tuning for Flash and PSRAM 2025-11-13 15:38:13 +05:30
Laukik Hase 466c1d66b6 refactor(esp_tee): Remove the spi_flash_erase_chip service call
- Also fix coverity bug from TEE HMAC-PBKDF2 routine
2025-09-30 12:22:26 +05:30
Laukik Hase c152663408 feat(esp_tee): Added support for PBKDF2-based (HMAC) ECDSA signing 2025-09-19 12:06:02 +05:30
Laukik Hase 11d3a2480f feat(esp_tee): Support for ESP32-C5 - the esp_tee component 2025-08-13 14:08:58 +05:30