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330 Commits

Author SHA1 Message Date
Sudeep Mohanty
00df6f1220 fix(lp_core): repair LP UART read_bytes RX handling 
Made-with: Cursor
 2026-06-16 18:02:54 +08:00
Sudeep Mohanty
1d2fb75846 fix(lp_core): skip LP UART RTS/CTS pin setup when flow control is disabled 
lp_core_uart_set_pin() unconditionally configured the RTS and CTS GPIO
pins even when flow control was disabled. Only configure the RTS pin
when UART_HW_FLOWCTRL_RTS is set, and the CTS pin when
UART_HW_FLOWCTRL_CTS is set.

Made-with: Cursor
 2026-06-16 18:02:54 +08:00
Sudeep Mohanty
aa86900364 fix(lp_core): fix LP UART IOMUX pin not bypassing LP GPIO Matrix for RX 
On chips with SOC_LP_GPIO_MATRIX_SUPPORTED (esp32p4, esp32s31), when the
default IOMUX pin is used for LP UART, calling rtc_gpio_iomux_func_sel()
alone only selects the IOMUX function on the pad side but does not set
sig_in_sel=0 on the peripheral side. This leaves the LP UART RX input
still reading from the LP GPIO Matrix (where no signal is connected),
causing RX to receive nothing.

Apply the same fix that was already in the HP UART driver: use
rtc_gpio_iomux_input() / rtc_gpio_iomux_output() which additionally
configure the peripheral to bypass the LP GPIO Matrix for IOMUX pins.
 2026-06-16 18:02:54 +08:00
Sudeep Mohanty
f40e50ee68 fix(lp_core): fix LP UART init parameter validation 
Align data_bits, flow_ctrl, and rx_flow_ctrl_thresh checks with uart_param_config().

Made-with: Cursor
 2026-06-16 18:02:54 +08:00
hebinglin
6361704a30 change(ulp): add lp periph intr enable apis 2026-06-02 11:47:59 +08:00
Sudeep Mohanty
1de3b83acc fix(ulp_riscv_i2c): Fix spurious pass in RTC I2C multi-device test 
The test was passing without real I2C communication due to a GPIO
mismatch (slave on GPIO 6/7 vs RTC I2C master on GPIO 2/3), single-byte
zero-coincidence, unchecked ULP return values, and an insufficient
RTC I2C timeout.

Fix slave GPIOs, increase test length, check I2C return values, add
proper assertions, and set an adequate RTC I2C timeout.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-05-15 14:43:49 +02:00
Evgeny Torbin
59f62ad15f test: format all test scripts 2026-04-17 16:01:00 +02:00
hebinglin
e16933fdcb fix(hal): fix the issue of dual-core contention for RTC_CNTL regs 2026-03-02 14:39:00 +08:00
Marius Vikhammer
bfc3815ce6 test(ulp): added larger delay in ULP FSM I_WR_REG instruction test 
Test is flakey, could possibly be due to the ULP occasionally needing
a bit more time to start up.
 2025-11-17 16:23:49 +08:00
Marius Vikhammer
5943637047 ci(ulp): reset board between ulp-fsm tests 2025-10-24 11:34:19 +08:00
Marius Vikhammer
88a430dbe3 fix(lp_core): fixed array-bound warning when compiling on P4 with -Os 
Closes https://github.com/espressif/esp-idf/issues/17054
 2025-08-29 13:19:49 +08:00
Jiang Jiang Jian
0c7bd3e961 Merge branch 'fix/lp_periph_use_int_raw_v5.3' into 'release/v5.3' 
change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status (v5.3)

See merge request espressif/esp-idf!39250
 2025-06-23 10:42:43 +08:00
Song Ruo Jing
8baffe22cb fix(uart): LP UART does not have the pre-divider for its clock source 
Closes https://github.com/espressif/esp-idf/issues/15427
 2025-05-22 11:51:19 +08:00
Sudeep Mohanty
ee995a79f3 change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status 
This commit updates the LP I2C and LP UART drivers to use the raw
interrupt status without enabling the interrupts.
 2025-05-19 10:38:07 +02:00
Jiang Jiang Jian
5eb2b8625e Merge branch 'fix/ulp_riscv_interrupt_bug_v5.3' into 'release/v5.3' 
fix(ulp): fix ULP RISC-V interrupt handler corrupting the stack (backport v5.3)

See merge request espressif/esp-idf!35226
 2025-04-27 14:19:20 +08:00
Konstantin Kondrashov
d41fc36511 fix(ulp): Fix accumulation of wakeup cause bits in ULP 
Closes https://github.com/espressif/esp-idf/issues/15794
 2025-04-18 15:52:46 +03:00
Omar Chebib
7721dd5d5d fix(ulp): fix ULP RISC-V interrupt handler corrupting the stack 
* Closes https://github.com/espressif/esp-idf/issues/14930
 2025-03-10 18:07:26 +08:00
wuzhenghui
1f6d8d4e5d fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management 2025-02-20 19:39:02 +08:00
Xiaoyu Liu
1ef5be3b39 fix(ulp): remove redefinition and unify gpio enum in ulp 
Closes https://github.com/espressif/esp-idf/issues/15219
 2025-01-16 09:22:48 +01:00
Marek Fiala
2b0407eb2a feat(tools): Enforce utf-8 encoding with open() function 2025-01-02 16:48:43 +01:00
Marius Vikhammer
f3557bcf5e fix(lp_core): updated lp rom newlib API addresses 2024-10-28 17:21:26 +08:00
andylinpersonal
88c476e630 fix(ulp): Add the missing extern "C" guard to ulp_lp_core_print.h 
This commit adds the missing extern `C` guards the ulp_lp_core_print.h
header file.

Closes https://github.com/espressif/esp-idf/pull/14329
 2024-08-13 23:08:30 +02:00
Marius Vikhammer
cab1a2ab4a fix(lp-core): fixed ULP shared mem address being wrong on P4 2024-08-02 14:23:52 +08:00
Marius Vikhammer
fc847a0e9f Merge branch 'feature/ulp_hp_core_printf_debug_v5.3' into 'release/v5.3' 
feat(ulp): add option for routing LP-printf to HP console (v5.3)

See merge request espressif/esp-idf!32493
 2024-08-02 14:05:55 +08:00
Marius Vikhammer
f7a3808374 feat(ulp): add option for routing LP-printf to HP console 2024-08-02 09:54:23 +08:00
Marius Vikhammer
21e23c16c4 Merge branch 'feat/lp_core_pre_calc_timer_v5.3' into 'release/v5.3' 
change(lp_core): changed wakeup time calc to use a precomputed tick value (v5.3)

See merge request espressif/esp-idf!32458
 2024-07-31 16:39:27 +08:00
Marius Vikhammer
dccd6b0259 change(lp_core): changed wakeup time calc to use a precomputed tick value 
Previously we would calculate the wakeup ticks upon every wakeup using the lp-timer clock frequency,
but this caused the binary to pull in software division functions, increasing the binary size.

This value is now precalculated by the hp-core when we configure the ULP. This saves about 1k bytes.
 2024-07-31 13:28:14 +08:00
Marius Vikhammer
cf36c11b81 feat(lp-core): added support for using ETM events as wake-up source 2024-07-31 11:55:24 +08:00
Marius Vikhammer
1a6f1e67c6 feat(ulp): include sdkconfig macros in cmake build 2024-07-30 10:27:28 +08:00
Marius Vikhammer
a2d2f30816 Merge branch 'contrib/github_pr_14010_v5.3' into 'release/v5.3' 
fix(ulp): Write pin's output mode to the correct register (GitHub PR) (v5.3)

See merge request espressif/esp-idf!31595
 2024-07-25 16:24:35 +08:00
Marius Vikhammer
ddc482f11f Merge branch 'fix/ulp_riscv_i2c_multi_byte_v5.3' into 'release/v5.3' 
fix(ulp-risc-v): Fixed RTC I2C multi-byte read/write issue for ULP RISC-V (v5.3)

See merge request espressif/esp-idf!31713
 2024-07-25 16:24:18 +08:00
Marius Vikhammer
fd6e699728 Merge branch 'feat/lp_core_lp_spi_support_v5.3' into 'release/v5.3' 
feat(lp-spi): Added support for LP SPI to the LP core (v5.3)

See merge request espressif/esp-idf!31762
 2024-07-25 16:24:04 +08:00
Sudeep Mohanty
5f6ddad456 fix(lp-i2c): Fixed the generation of spurious I2C start with lp-i2c 
This commit fixes an issue with LP I2C and RTC I2C where in the
peripherals generated a spurious I2C start condition when initialized.
This caused some sensors to not respond properly to the following read
or write request.

Closes https://github.com/espressif/esp-idf/issues/14043
Closes https://github.com/espressif/esp-idf/issues/11608
 2024-07-12 17:39:53 +02:00
Sudeep Mohanty
1c95a38ed1 test: Added LP core unit tests for LP SPI 
This commit adds tests for LP SPI master and LP SPI slave devices.
 2024-06-28 08:57:28 +02:00
Sudeep Mohanty
f910f13de9 feat(lp-spi): Added support for LP SPI driver to the LP Core on esp32p4 
This commit adds LP SPI master and LP SPI slave support for the LP Core
on the esp32p4.
 2024-06-28 08:57:28 +02:00
Marius Vikhammer
350d4c03da docs(ulp): fix doxygen comment formatting 2024-06-27 17:08:25 +08:00
Sudeep Mohanty
52a5fbf3f9 fix(ulp-risc-v): Fixed RTC I2C multi-byte read/write issue for ULP RISC-V 
This commit fixes an issue where multi-byte reads and writes over the
RTC I2C peripheral got stuck on the esp32s2 and esp32s3.

Closes https://github.com/espressif/esp-idf/issues/12235
 2024-06-24 17:10:36 +02:00
LonerDan
fbd6c9737e fix(ulp-risc-v): Set RTC GPIO output mode in the correct register for ULP RISC-V 
According to the ESP32-S2/S3 TRM, the output pin's mode is set in the RTC_GPIO_PINn_REG
by programming the RTC_GPIO_PINn_PAD_DRIVER bit. The current ULP RISC-V RTCIO driver
however, incorrectly programs the RTC_IO_TOUCH_PADn_REG register field RTC_IO_TOUCH_PADn_DRV.
This commit fixes the bug.
 2024-06-19 08:59:57 +02:00
Jiang Jiang Jian
832337bdee Merge branch 'fix/support_union_lp_io_clk_control_v5.3' into 'release/v5.3' 
fix(esp_driver_gpio): manage lp_io module clock by driver (v5.3)

See merge request espressif/esp-idf!31359
 2024-06-11 10:45:00 +08:00
wuzhenghui
091da3d631 fix(esp_driver_gpio): manage lp_io module clock by driver 
Closes https://github.com/espressif/esp-idf/issues/13683
 2024-06-06 19:27:57 +08:00
Marius Vikhammer
2f1b81cd14 feat(ulp): add pulse counter example for lp core 2024-05-30 14:41:47 +08:00
Marius Vikhammer
87d4172ee5 feat(ulp): add lp core panic handler 2024-05-30 14:41:31 +08:00
Marius Vikhammer
7f9b5deae1 feat(ulp): support interrupts for C6/P4 LP core 
Closes https://github.com/espressif/esp-idf/issues/13059
 2024-05-30 14:40:23 +08:00
Marius Vikhammer
e53ca8e018 fix(lp_core_test): fixed race-condition in lp core tests 2024-05-20 11:59:10 +08:00
laokaiyao
fc000cd7b7 ci(doc): enable doc build for esp32c5 2024-04-18 19:39:29 +08:00
Marius Vikhammer
1fa59c442b fix(ulp): fixed lp-core not booting during sleep 
LP core was unable to boot when system was in deepsleep.
This was due to lp uart init in LP rom using XTAL as clk source,
which is normally powered down during sleep.

This would cause lp uart to get stuck while printing ROM output,
and the app would never boot.

Also fixed wrong wakeup cause used by HP core for ULP wake up
 2024-04-18 11:36:30 +08:00
Marius Vikhammer
4533f16c34 fix(rtc_memory): fix conflict between LP-ROM and RTC reserved 2024-04-17 13:37:56 +08:00
Marek Fiala
f2b75d81b3 fix(system): fix idf.py build ulp examples containing spaces in path on Win 2024-04-09 14:00:34 +02:00
Alexey Lapshin
4879bac36c feat(ulp): use --mcpu=esp32s3 for esp32s3 2024-04-04 16:12:39 +08:00
Marius Vikhammer
cbc632bd04 fix(lp_core): fix kconfig not allowing using all of LP mem for P4 lp core 2024-03-28 16:39:16 +08:00