FIFOTH.dma_multiple_transaction_size was never programmed and kept its
reset value of 0, which selects 1-byte DMA bursts. On esp32p4 with flash
encryption enabled those bursts do not reach PSRAM.
Add sdmmc_ll_set_dma_burst_size() and a dma_burst_size field in
sd_host_sdmmc_cfg_t, 0 selecting the per-target default. esp32p4
defaults to 16 bytes; esp32 and esp32s3 keep their current 1 byte.
- only slot1 takes dedicated pads
- remove slot1 should clear the control of dedicated pads
- fix the current leakage in deep sleep caused by the sdmmc pads
Define per-target SDIO slave descriptor buffer limits in the LL layer and validate queued send buffers against the 4-byte aligned effective maximum. Update the public docs to describe the chip-dependent limit instead of hardcoding 4092 bytes.
Co-authored-by: Cursor <cursoragent@cursor.com>