Jiang Jiang Jian
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24718710ad
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Merge branch 'ci/enable_s31_ulp_multi_dev_v6.1' into 'release/v6.1'
ci(ulp): re-enable multi dev tests for S31 ULP (v6.1)
See merge request espressif/esp-idf!51143
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2026-07-30 17:56:34 +08:00 |
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Marius Vikhammer
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a5dfeca61d
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ci(ulp): re-enable multi dev tests for S31 ULP
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2026-07-24 09:44:58 +02:00 |
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Song Ruo Jing
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a59daff749
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fix(uart): fix uart sw flow ctrl XOFF char write to wrong reg on ESP32C6
Add software flow control test case
Introduced in e6ef4d1791
Closes https://github.com/espressif/esp-idf/issues/18779
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2026-07-15 16:45:39 +08:00 |
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wuzhenghui
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d5d3cddf23
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feat(esp_hw_support): support PMU clock ICG management for esp32s31
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2026-06-30 14:23:54 +08:00 |
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gaoxu
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d81e76b1b6
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fix(uart): fix ESP32-S3 uart2 is_ enabled check error
(Closes https://github.com/espressif/esp-idf/issues/18690)
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2026-06-05 17:31:53 +08:00 |
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Hu Rui
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131bb462a4
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feat(uhci): Add support for uhci on esp32s31
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2026-04-21 14:41:22 +08:00 |
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gaoxu
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0068fb1507
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feat(uart): support HP/LP uart on ESP32S31
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2026-04-15 10:57:26 +08:00 |
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Hu Rui
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7c56253e33
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feat(uhci): Add support for uhci on esp32h4
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2026-04-01 17:15:32 +08:00 |
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C.S.M
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ba8b4cfd9e
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feat(uhci): Add support for uhci on esp32h21
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2026-03-24 19:00:10 +08:00 |
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hebinglin
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96af3e4d2e
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change(example): change uart wakeup mode 0 edge threshold
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2026-03-06 11:23:27 +08:00 |
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Li Shuai
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455cb7e7be
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feat(esp_hal_uart): support esp32p4 hp uart 3,4 wakeup during light sleep
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2026-03-05 18:11:17 +08:00 |
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Song Ruo Jing
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8baea2e4a0
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feat(uart): add glitch filter functionality for UART
Closes https://github.com/espressif/esp-idf/issues/17847
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2026-01-23 11:36:32 +08:00 |
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wuzhenghui
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f6730e1f32
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fix(soc): fix LP_UART clock source definitions to FOSC instead of LP_FAST
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2026-01-15 16:35:05 +08:00 |
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hebinglin
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f53a9a3a76
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feat(esp_hw_support): support hp uart wakeup with 4 modes in esp32h4
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2026-01-12 10:40:55 +08:00 |
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Song Ruo Jing
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e0d3cc040d
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refactor(uart): clean up uart soc_caps
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2025-12-25 14:52:11 +08:00 |
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Song Ruo Jing
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74aeb3f41f
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refactor(uart): split UART HAL into separate component
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2025-12-25 14:41:28 +08:00 |
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