Commit Graph
156 Commits
Author SHA1 Message Date
Mahavir Jain 4163417ff1 Merge branch 'feat/support_rom_psa_mbedtls_v6.0' into 'release/v6.0'
feat(mbedtls): enable ESP32-C2(Rev2.0) ROM mbedTLS crypto for PSA (v6.0)

See merge request espressif/esp-idf!48843
2026-06-29 11:22:33 +05:30
harshal.patil 5f824c8683 fix(secure_boot): range-check ECDSA r,s in bootloader before ROM verify 2026-06-12 17:32:38 +05:30
harshal.patil c1f70a4cb5 fix(esp_rom): Patch ets_ecdsa_verify() to include signature bounds check 2026-06-09 15:07:53 +05:30
Jiang Guang Ming 61cd10bf76 feat(esp_rom): merge rom.mbedtls.ld to rom.mbedtls.eco4.ld 2026-05-25 10:08:16 +08:00
wanglei 1f559a5558 fix(esp_rom): implement cache writeback related apis in iram
avoid critical issues caused by manual cache writeback and conflicting
writes. The issue exist on chips after esp32p4
2026-05-22 10:16:02 +08:00
Frantisek Hrbata f34fa1c269 fix(esp_rom): exclude TLSF/multi_heap ROM patches from bootloader build
The bootloader does not use the heap allocator or TLSF, so the ROM
patch files esp_rom_tlsf.c and esp_rom_multi_heap.c are not needed
in the bootloader build.

In the cmakev1 build system this was never an issue because cmakev1
uses an early expansion phase where only Kconfig files for components
listed in BUILD_COMPONENTS are processed. Since the heap component is
not part of the bootloader's component list, its Kconfig options
(CONFIG_HEAP_TLSF_USE_ROM_IMPL, etc.) were never defined and the
conditional compilation of these source files was effectively skipped.

In the cmakev2 build system, Kconfig options from all discovered
components are visible regardless of whether the component is part
of the build. Because the bootloader reuses the main project's
sdkconfig (where CONFIG_HEAP_TLSF_USE_ROM_IMPL defaults to y on
targets with ROM TLSF support like esp32c2), the TLSF patch sources
were being compiled into the bootloader's esp_rom. This caused a
build failure because esp_rom_tlsf.c includes tlsf_block_functions.h
from the heap component, which is not a dependency of esp_rom and is
not part of the bootloader build.

Guard the TLSF and multi_heap ROM patch sources with NOT
BOOTLOADER_BUILD to prevent them from being compiled in the
bootloader context. This fix is compatible with both cmakev1 and
cmakev2.

Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
2026-04-27 22:07:10 +08:00
Xiao Xufeng 29587bb50a fix(esp32p4): fix rom and ld misuse min_rev 2026-01-28 21:42:03 +08:00
yinqingzhao 695fa93894 feat(rom): add esp32c61 eco4 ld files 2026-01-10 13:22:52 +08:00
wanglei f4a5e3cb9b feature(esp_rom): add esp32c5 eco3 rom ld 2026-01-10 13:15:12 +08:00
Song Ruo Jing ce475d901d refactor(uart): split UART HAL into separate component 2026-01-04 16:02:57 +08:00
morris b390af239b refactor(hal_wdt): esp_hal_wdt also maintains the ROM implementation 2025-12-10 13:54:44 +08:00
Alexey Lapshin ad7f4b9670 feat(esp_libc): make picolibc default libc 2025-12-06 00:08:35 +07:00
Laukik Hase f20351eb3b fix(esp_tee): Use HAL APIs instead of ROM APIs for SPI flash service calls
Currently, REE SPI flash HAL operations are routed as service calls to TEE,
but the TEE implementation incorrectly uses ROM APIs instead of HAL APIs.
This leads to issues and is not the recommended approach.
2025-11-13 15:38:12 +05:30
C.S.M c81cf3bdf6 refactor(spi_flash): Remove spi_flash rom driver patch config option 2025-10-22 10:37:19 +08:00
morris 56c3dc4755 feat(wdt): graduate watch dog hal driver into a new component: esp_hal_wdt 2025-10-14 11:44:32 +08:00
armando 179d00a6f8 feat(p4): p4 rev3 real chip support 2025-08-28 17:56:16 +08:00
Chen Ji Chang 2044fba6e7 Merge branch 'feat/h4_mp_update_rom_linker' into 'master'
feat(h4mp): update rom linker (part3)

Closes IDF-13770

See merge request espressif/esp-idf!41213
2025-08-27 11:43:40 +08:00
Alexey Lapshin 913d38ba14 fix(newlib): fix CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS for c2/c3/c6/h2/h21
PMP configurations for load and store addresses may
have different permissions (e.g., "R" vs. "RW").

Due to the timing alignment of internal signals, the address
permission check may be incorrectly applied during the second
part of a misaligned access transaction.

As a workaround, insert two instructions (e.g. ADDI/NOP) between
accessing to different memory regions. This spacing avoids the
false permission check caused by signal timing overlap.
2025-08-22 13:46:43 +08:00
Chen Jichang d0ad1145fc feat(h4mp): update rom linker (part3) 2025-08-18 14:24:12 +08:00
Laukik Hase 340de9823a feat(esp_tee): Support for ESP32-C5 - the rest of the components 2025-08-13 14:08:59 +05:30
Alexey Lapshin 4dc6cb3fa1 change(newlib): change CONFIG_NEWLIB* prefix to CONFIG_LIBC_NEWLIB* 2025-08-11 19:06:44 +07:00
Laukik Hase f2b0f256ab fix(esp_rom): Patch the esp_rom_delay_us API to use U-mode cycle CSR 2025-07-25 09:54:42 +05:30
Armando (Dou Yiwen) c5a7513cb8 Merge branch 'feat/p4_eco5_fpga' into 'master'
esp32p4: eco5 support on FPGA

See merge request espressif/esp-idf!39917
2025-07-11 01:27:22 +00:00
armando dfb0662de2 feat(esp32p4): support eco5 on fpga 2025-07-10 06:24:32 +00:00
morris c4d7b1cfce refactor(uart)!: deprcated esp_rom_uart.h 2025-07-08 18:56:17 +08:00
Song Ruo Jing cde716e093 feat(regi2c): add regi2c support for esp32h4 2025-06-27 17:18:33 +08:00
wanckl c36f55c451 feat(esp_rom): update rom files for eco3 2025-05-26 11:39:26 +08:00
Island 6897f90612 Merge branch 'feat/reduce_bin_size_and_iram_for_ble_rom_code' into 'master'
feat(ble/controller): Reduce bin size and IRAM for BLE rom code on ESP32-C3 and ESP32-S3

Closes BLERP-1855

See merge request espressif/esp-idf!38987
2025-05-22 20:20:22 +08:00
zhiweijian 1d739291ca feat(ble/controller): Reduce bin size and IRAM for BLE rom code 2025-05-21 10:22:37 +08:00
Laukik Hase 12e2df2d74 feat(esp_tee): Support for ESP32-H2 - the rest of the components 2025-05-20 16:31:23 +05:30
Laukik Hase 223c0d5f9d feat(esp_tee): Use the ROM TLSF implementation for the TEE build 2025-04-08 19:50:27 +05:30
zhiweijian 8012834e2b fix(bt/controller): Fixed controller flash only bug if hci-uart is enabled 2025-03-28 21:52:09 +08:00
Alexey Lapshin ec68cb3300 feat(newlib): riscv: add CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS config option
This option replaces implementations of functions from ROM:
  - memcpy
  - memcmp
  - memmove
  - str[n]cpy
  - str[n]cmp

The functions used in the firmware will be better optimized for misaligned
memory. Here are some measurements in CPU cycles for 4096-byte buffers:

  memcpy:  28676 -> 4128
  memcmp:  49147 -> 14259
  memmove: 33896 -> 8086
  strcpy:  32771 -> 17313
  strcmp:  32775 -> 13191
2025-03-26 17:27:24 +07:00
Marius Vikhammer 12e9d6514a fix(console): fixed secondary console not working on all chips without VFS 2025-03-07 14:41:19 +08:00
Chen Jichang a74f9cbe63 feat(esp32h4): add esp_rom and efuse files (stage4) 2025-02-25 19:30:03 +08:00
harshal.patil 37de702e97 feat(nvs_flash): Enable the usage of mbedtls from ROM for bootloader NVS decryption
Bootloader NVS decryption uses hardware ROM APIs to decrypt the NVS contents,
but for targets that do not support AES hardware we could benefit by using the
software mbedtls library that is present in the ROM directly.
2025-01-29 18:51:29 +05:30
Alexey Lapshin 888b5f7e8d feat(newlib): add picolibc support 2024-12-02 21:35:56 +07:00
Laukik Hase 2dee5791a6 feat(esp_tee): Support for ESP-TEE - esptool_py, esp_rom & other components 2024-12-02 11:27:58 +05:30
Shen Weilong ccc2411191 feat(ble): Support for putting code in flash on ESP32-C2 2024-11-12 18:08:50 +08:00
zhiweijian 4b767d03fe feat(bt/controller): Support controller code run in flash only 2024-10-30 10:05:39 +08:00
Jiang Jiang Jian 9a47de53e1 Merge branch 'feat/support_esp32c2_eco4_rom_mbedtls_v3.6.0_lts' into 'master'
feat(mbedtls): support esp32c2 rev2.0 ROM mbedTLS v3.6.0-LTS

Closes IDF-10680

See merge request espressif/esp-idf!33227
2024-09-09 16:53:53 +08:00
Armando (Dou Yiwen) 5dff189341 Merge branch 'feat/xip_psram_c5' into 'master'
psram: xip_psram support on c5/c61, also fixed cache writeback/invalidate not work issue on c61

Closes IDF-8688, IDF-9292, and IDF-11008

See merge request espressif/esp-idf!33265
2024-09-06 10:39:57 +08:00
Jiang Guang Ming 4955a199a8 feat(esp_rom): include rom.mbedtls.eco4.ld with C2 rev2.0(ECO4) select 2024-09-06 09:55:27 +08:00
Armando 5316a36175 fix(cache): fixed cache writeback/invalidate cannot reach higher vaddr parts 2024-09-05 18:47:02 +08:00
Jiang Guang Ming 53272f7d11 feat(esp_rom): Add esp32c2.rom.eco4.ld 2024-09-03 17:50:39 +08:00
xuxiao 8780375859 feat(wifi): add wifi support for esp32c61 2024-08-30 20:43:06 +08:00
Song Ruo Jing ab4157b6cf fix(gpio): patched esp_rom_gpio_connect_out_signal for esp32 and esp32s2
The original ROM function enabled output for the pad first, and then connected the signal
This could result in an undesired level change at the pad

Closes https://github.com/espressif/esp-idf/issues/12826
2024-08-15 16:36:18 +08:00
Jiang Jiang Jian e37ff3565b Merge branch 'bugfix/fix_newlib_nano_float_printf_issues' into 'master'
fix(esp_rom): add new rom caps ESP_ROM_HAS_NEWLIB_PRINTF_BUG

See merge request espressif/esp-idf!30956
2024-07-26 17:37:03 +08:00
xuxiao c6104388aa feat(wifi): add wifi support for esp32c5 mp 2024-07-24 18:03:40 +08:00
Shen Weilong f3b92cabfa update(phy): Added phy support for esp32c5 2024-07-23 15:34:58 +08:00