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935 Commits

Author SHA1 Message Date
Jiang Jiang Jian
f409428bf3 Merge branch 'bugfix/esp32c5_encrypted_flash_write_v6.0' into 'release/v6.0' 
fix(spi_flash): Add CPU frequency switching during flash encrypted write (v6.0)

See merge request espressif/esp-idf!44304
 2025-12-21 15:28:33 +08:00
Xiao Xufeng
ae7124abe3 feat(spi_flash): implement dynamic CPU frequency switching workaround for encrypted writes 
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes

Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
  CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
  use SPI1 and must work correctly at reduced CPU frequencies

Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
  hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases

This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
 2025-12-17 01:21:45 +08:00
Mahavir Jain
86f159ec06 fix(spi_flash): limit CPU clock to 160MHz for encrypted flash writes 2025-12-17 01:21:45 +08:00
wanckl
d12f941787 feat(driver_spi): split spi hal component 2025-12-16 20:38:09 +08:00
Martin Vychodil
7c4eac9e22 Merge branch 'feat/spi_flash_bdl_support_v6.0' into 'release/v6.0' 
feat(bdl): Add support for spi_flash (v6.0)

See merge request espressif/esp-idf!43812
 2025-12-11 21:28:52 +08:00
Adam Múdry
064630c582 feat(bdl): Add support for spi_flash 2025-12-10 22:39:03 +08:00
C.S.M
ed64e7bf78 ci(header_check): Add check for public header should not include freertos 2025-12-10 15:10:43 +08:00
Song Ruo Jing
62899cbba6 refactor(gpio): split GPIO HAL into separate component 
cleaned up some includes in GPIO peripheral files
 2025-12-08 14:33:26 +08:00
morris
f050c1deb1 Merge branch 'fix/no_function_call_in_min_max_v6.0' into 'release/v6.0' 
refactor: avoid function calls inside MIN/MAX macros (v6.0)

See merge request espressif/esp-idf!43476
 2025-11-21 12:03:09 +08:00
C.S.M
e0a6261993 fix(spi_flash): Fix software resume wrong config name in flash init 2025-11-18 17:50:24 +08:00
morris
e9539d4560 refactor: avoid function calls inside MIN/MAX macros 2025-11-18 15:18:14 +08:00
armando
1f7b1f3615 feat(mspi): supported psram & flash 120MHz timing tuning 2025-11-06 02:20:48 +00:00
C.S.M
c81cf3bdf6 refactor(spi_flash): Remove spi_flash rom driver patch config option 2025-10-22 10:37:19 +08:00
morris
e8de5b5a95 refactor(gptimer): clean up SOC capabilities for GPTIMER and Timer Group 
- Remove GPTIMER and TIMG related definitions from soc_caps_full.h files
- Move timer peripheral definitions to appropriate HAL layer files
- Update references across components to use proper HAL abstractions
- Consolidate timer group and GPTIMER capabilities organization
- Ensure consistent timer configuration across all ESP32 variants

This refactoring improves the separation of concerns between SOC
capabilities and HAL implementations for timer-related functionality.
 2025-10-14 11:44:38 +08:00
morris
cd41b6a640 refactor: remove unnecessary driver dependencies from build rules 2025-10-11 14:02:29 +08:00
Peter Dragun
800f141f94 Merge branch 'feat/esptool_v5' into 'master' 
Update esptool to v5: replace deprecated commands, documentation updates and cleanup

Closes IDF-12564

See merge request espressif/esp-idf!41176
 2025-10-01 14:36:26 +08:00
Peter Dragun
e3198fff3c feat: Update esptool to v5 2025-09-30 15:28:55 +02:00
Chen Chen
a4710cc206 refactor(driver): remove redundant driver dependencies 
now the driver component only contains legacy code for i2c, twai and
touch sensor
 2025-09-30 15:47:45 +08:00
C.S.M
a417158514 Merge branch 'feat/mspi_suspend_p4_eco5' into 'master' 
feat(spi_flash): Support flash suspend on esp32p4 resivion 3

Closes IDF-13511

See merge request espressif/esp-idf!42104
 2025-09-30 15:14:09 +08:00
C.S.M
f022b67486 feat(spi_flash): Support flash suspend on esp32p4 resivion 3 2025-09-28 16:25:28 +08:00
C.S.M
b145ede835 refactor(mspi): Make mspi hal layer independent 2025-09-26 14:57:54 +08:00
Konstantin Kondrashov
b7da740f12 Merge branch 'feature/log_v2_optimization' into 'master' 
feat(log): Optimize idf components for binary logging

Closes IDF-12775

See merge request espressif/esp-idf!40289
 2025-09-19 14:45:43 +08:00
Konstantin Kondrashov
16d73cdab3 feat(log): Adds ESP_LOG_ATTR macro to control section placement 2025-09-15 15:59:52 +03:00
Konstantin Kondrashov
dcf486359e feat(log): Optimize log tag init for bin logging 2025-09-15 15:59:52 +03:00
armando
00022a379a change: remove deprecated items 2025-09-15 10:52:28 +08:00
gaoxu
41f954facf feat(h21_mp): update H21_MP soc headers 2025-08-21 14:19:41 +08:00
C.S.M
65a6e9c294 Merge branch 'fix/flash_qio_read_failed' into 'master' 
fix(spi_flash): Fix spi flash qio read failed on gpspi flash

See merge request espressif/esp-idf!41204
 2025-08-20 16:11:06 +08:00
Marek Fiala
9d35d63651 feat(cmake): Update minimum cmake version to 3.22 (whole repository) 2025-08-19 14:44:32 +02:00
C.S.M
34f9863115 fix(spi_flash): Fix spi flash qio/dio read failed on gpspi flash 2025-08-18 10:37:04 +08:00
C.S.M
185857aee2 fix(spi_flash): Fix spi_flash clock for gpspi on esp32c5/p4 2025-08-18 10:37:04 +08:00
Sudeep Mohanty
11b80a7f11 Merge branch 'feat/freertos_in_flash_by_default' into 'master' 
feat(freertos): Place FreeRTOS in flash by default

Closes IDF-12695

See merge request espressif/esp-idf!40579
 2025-08-15 02:18:57 +02:00
gaoxu
5433c4c3c5 fix(flash): fix H21/H4 error on FPGA because of wrong flash speed 2025-08-11 18:09:44 +08:00
Sudeep Mohanty
26c19928a9 feat(freertos): Place FreeRTOS in flash by default 
The following updates have been made in this commit:
- The commit places FreeRTOS code in flash memory by default.
- CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH has been removed.
- CONFIG_FREERTOS_IN_IRAM is unhidden and can be used to restore the
  previous memory placement.
- A test has been added for users to conduct performance impact testing
  based on memory placement configurations.
 2025-08-07 19:56:30 +08:00
harshal.patil
60ff4bca9b refactor(esp_system): Update all references of the memory protection configs 2025-08-04 11:43:01 +05:30
harshal.patil
55e0730a8d change(esp_hw_support): Move security-related modules to the esp_security component 
- Also adds support to whitelist target specific expected dependency violations
in check_dependencies.py
 2025-08-04 11:43:01 +05:30
Marius Vikhammer
4065fb20f3 Merge branch 'feature/esp_test_utils_component' into 'master' 
change(test_utils): moved test_utils out of unit-test-app project

See merge request espressif/esp-idf!40678
 2025-08-01 11:04:37 +08:00
C.S.M
de58c6d0a3 Merge branch 'feat/support_gd55' into 'master' 
feat(spi_flash): Add support for gd55f flash chip

See merge request espressif/esp-idf!40878
 2025-07-30 17:05:48 +08:00
C.S.M
1c18d65416 feat(spi_flash): Add support for gd55f flash chip 2025-07-30 11:37:21 +08:00
C.S.M
6ad49c1146 refactor(spi_flash): Remove sdkconfig dependency in flash hal layer 2025-07-28 18:16:19 +08:00
C.S.M
6f7ca07018 Merge branch 'fix/fix_gpspi_flash_frequency' into 'master' 
refactor(spi_flash): Refactor gpspi flash for making it's clock accurate

Closes IDF-13566

See merge request espressif/esp-idf!40651
 2025-07-23 16:46:30 +08:00
C.S.M
90d3d658bb Merge branch 'refactor/remove_flash_ut' into 'master' 
refactor(spi_flash): Remove the useless flash/psram unit test

See merge request espressif/esp-idf!40739
 2025-07-23 11:03:25 +08:00
C.S.M
6b19cd3932 refactor(spi_flash): Remove the useless flash/psram unit test 2025-07-22 12:02:41 +08:00
C.S.M
332614165b refactor(spi_flash): Refactor gpspi flash for making it's clock accurate 2025-07-22 11:59:45 +08:00
C.S.M
b765ad43cf feat(spi_flash): Add flash suspend support on esp32h21, esp32h4 2025-07-21 19:24:00 +08:00
C.S.M
50aee21d33 feat(spi_flash): Add basic support for esp32h4 2025-07-21 19:24:00 +08:00
C.S.M
bc9fa040da feat(spi_flash): support spi_flash on esp32h21 2025-07-21 19:24:00 +08:00
Marius Vikhammer
bf84ab652a change(test_utils): moved test_utils component to tools/test_apps/components/ 2025-07-21 14:05:50 +08:00
C.S.M
5812b19e91 Merge branch 'refactor/gpio_valid_2_soc' into 'master' 
refactor(gpio): Move valid gpio_caps macro from driver layer to soc layer

Closes IDF-13564

See merge request espressif/esp-idf!40521
 2025-07-18 13:18:46 +08:00
Sudeep Mohanty
c8f68c72a7 Merge branch 'feat/remove_global_cmake_vars' into 'master' 
change(esptool_py): Make esptool_py component idempotent in the build

Closes IDF-13073

See merge request espressif/esp-idf!39589
 2025-07-17 17:13:49 +02:00
C.S.M
001d01f93a refactor(gpio): Move valid gpio_caps macro from driver layer to hal 2025-07-17 16:54:54 +08:00