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3 Commits
Author SHA1 Message Date
Evgeny Torbin 59f62ad15f test: format all test scripts 2026-04-17 16:01:00 +02:00
Sudeep Mohanty bc74cf808d feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts 
This commit adds a Kconfig option, CONFIG_ULP_RISCV_INTERRUPT_ENABLE, to
enable interrupts on the ULP RISC-V core on the esp32s2 and esp32s3.
 2024-02-21 11:45:06 +01:00
Sudeep Mohanty 4230acb971 feat(ulp-riscv): Added new example to demonstrate ULP RISC-V interrupts 
This commit adds a new example which demonstrates how the ULP RISC-V
co-processor handles interrupts.
 2024-01-18 15:59:49 +01:00