A PMP entry the (non-OTA-updatable) bootloader locks cannot be reconfigured
by the application until CPU reset, so the layout of the entries a shipped
bootloader locks is a bootloader<->application ABI that renumbering would
silently break on deployed devices.
On C5, C6, C61, H2 and P4 the bootloader now configures only the PMA invalid regions
and leaves PMP to the application.
On C5 the application programs the two ROM entries without a cfg reset:
v6.0/v6.1 bootloaders lock the TOR base entry at SOC_IROM_MASK_LOW, so on
such devices the TOR region above it spans the ROM text and must keep the
X bit those bootloaders left in the following unlocked entry, which
OR-only writes can never clear. With newer bootloaders the application
receives clean entries and the ROM data region gets the intended strict R
permission.
Rename the internal ULP child-build marker to __ULP_BUILDV2 so component CMake files make the build-system scope explicit.
Document that the marker is currently set only by the IDF_BUILD_V2 ULP child path.
Route ulp_embed_binary() through a built-in CMake v2 default ULP project instead of generating a compatibility project with a synthetic main component.
Attach legacy ULP sources directly to the ULP executable, pass the parent component include view through the existing ULP_S_SOURCES/COMPONENT_* channel, and remove the generated legacy project templates plus the component path ownership validation bypass they required.
Update the build-system coverage to assert that the builtin child project builds and rebuilds when parent-owned ULP sources change.
Allow the reconfigure test to assert the buildv2 activation message when pytest runs with --buildv2.
Make the ULP API probe use CMake-friendly forward-slash paths and an explicit ULP toolchain/custom-toolchain setting so the direct cmake configure works on Windows as well as Linux.
Preserve all linker scripts passed to target_linker_script() so LP-core child builds keep the full esp32p4 LP ROM script set instead of only the first script.
Link the ULP runtime component as WHOLE_ARCHIVE for ULP child builds, matching the legacy helper behavior where runtime sources were added directly to the executable. This keeps strong runtime handlers such as ulp_lp_core_panic_handler from being skipped in favor of weak defaults from already-extracted archive objects.
Validated with the esp32p4 lp_core_hp_uart panic and LP-ROM pytest cases, plus the focused local/CI build_all shape for the app.
fix(bt): Fixed several issues on BR/EDR controller on ESP32-S31
Closes BTQABR2023-829, BTQABR2023-836, BTQABR2023-837, BTQABR2023-840, BTQABR2023-687, and BTQABR2023-697
See merge request espressif/esp-idf!51249
Fixed bug when BR/EDR ACL-U dynamic Tx buffer is enabled
Fixed infinite loop during connection set-up
Optimized the scheduling of SCO/eSCO and sniff events
idf-ci emits a skip pipeline containing only a fake_pass job, with no
include of test_child_pipeline.yml, when the modified files match no
buildable apps. patch_buildv2_child_pipeline.py redefined
generate_pytest_child_pipeline unconditionally, assuming the included
template supplied its tags, image and assign_test stage via keyword
merge. With the template absent, the injected job was bare: no tags,
default test stage. It was scheduled on the wrong runner and failed,
turning the allow_failure build_child_pipeline_buildv2 bridge red on
every buildv2 MR whose changes produce an empty app matrix.
Return early when a fake_pass job is present so the child pipeline is
left untouched and skips, matching the default build path. Add a unit
test for the patch script and a host_test job to run it.
Validate BitScrambler program headers against the supported format and
hardware limits before using header-derived instruction and LUT sizes.
Also add regression coverage for malformed headers and document that the
program blob must come from a trusted assembler output.
Reject LUT loads that exceed the hardware address space and assemble
each 32-bit LUT word via memcpy so unaligned and partial inputs do not
read past the caller buffer. Add regression tests for oversized and
partial unaligned LUT loads.
Clear the returned handle on loopback creation failure and route
initialized objects through bitscrambler_free so channel ownership and
extra cleanup state cannot leak after partial setup errors. Add a
regression test for the failed create path.
Both newlib and picolibc headers in toolchain 16.1 declare timespec_get()
but the archives do not define it. Provide the missing C11 implementation
through esp_libc, mapping TIME_UTC to clock_gettime(CLOCK_REALTIME).
Closes https://github.com/espressif/esp-idf/issues/18889
Add SOC_DEBUG_HAVE_OCD_STUB_BINS for esp32c5, esp32c61, esp32h4,
esp32h21, esp32p4, and esp32s31. Update TEE linker scripts with
correct esp_tee_app_config offsets for the 0x3000 stub reservation
Move 7 trace-related examples (app_trace_basic, app_trace_to_plot,
esp_trace_custom_library, function_tracing, gcov, sysview_tracing,
sysview_tracing_heap_log) from examples/system/ into a dedicated
examples/system/tracing/ subdirectory for better organization.
Update all path references across documentation (en + zh_CN),
build-test-rules, CI configs, Kconfig, and component READMEs.
Configure the shared LCDCAM core clock through guarded LCD and CAM LL APIs,
and unify LCD functional clock LL calls around group IDs across supported targets.
Co-authored-by: Cursor <cursoragent@cursor.com>