PMP entry 3 (SOC_DROM_MASK_HIGH, TOR mode) in the memprot path
was incorrectly granted RW permission on esp32h21 and esp32c61.
The mask ROM data region is inherently read-only; remove the W bit.
Also added necessary tests to check voilations and re-enabled
tests for ESP32P4
Add ESP32-S31 USB DWC/UTMI LL headers, SoC register structures, peripheral
descriptors, capabilities, and linker mappings so the HS OTG controller and
UTMI PHY can be built in esp_hal_usb.
Introduce SOC_USB_FSLS_PHY_NUM on USB-OTG targets to separate FSLS USB_WRAP
support from OTG/UTMI support. Use it to gate usb_wrap, the USB PHY driver,
docs, and example build rules on targets without an FSLS PHY.
Also add UTMI data pulldown control to the HAL, clear the boot-time DWC
suspend state on ESP32-S31, alias the legacy internal PHY target to UTMI for
backward compatibility, and extend usb_phy tests for UTMI-only targets.
No esp32s31 boards are registered in the flash_suspend runner pool yet.
The test_rtc_clk_flash test targets all SOC_CLK_TREE_SUPPORTED chips and
creates a flash_suspend CI job for esp32s31 that immediately fails with
no runner assigned. Add a temp_skip_ci matching the existing pattern for
esp32h2.
Tracked in IDF-15531.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Add a dedicated esp_cpu test app that covers the supported helper APIs,
interrupt helpers, debug helper validation, and destructive trigger cases.
Made-with: Cursor
Treat ESP_INTR_FLAG_SHARED_PRIVATE as shared when selecting interrupt
lines and avoid misclassifying private shared vectors as non-shared
during free. Also fix two error-path leaks in esp_intr_alloc_info by
freeing the temporary handle and rolling back group_name on allocation
failure.
refactor(esp_hw_support): add semantic vector descriptor helpers
Introduce helper macros to classify vector descriptor state (shared,
non-shared, private shared, and uninitialized) and apply them in
allocator/free/dump paths. This makes private-shared semantics explicit
and reduces repeated bitwise checks.
Rename vector descriptor helpers to explicitly distinguish public
shared, private shared, and shared-family states. This improves
readability and avoids ambiguity when handling mixed shared/non-shared
flag combinations.
CSR_PRV_MODE is only defined for a subset of RISC-V targets. Targets
that lack it (e.g. esp32h21, esp32h4, esp32s31) caused an assembler
error. Fall back to returning -1 (unsupported) when the CSR is not
defined.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Reject invalid breakpoint/watchpoint indices and validate
watchpoint size before alignment checks. This makes the APIs
match their documented contract and avoids crashing on invalid
input.
Made-with: Cursor
C.S.M
Xorlent
yinqingzhao
wuzhenghui
gaoxu
nilesh.kale
Omar Chebib
wanckl
Hou Hai Yan
Igor Masar
Marius Vikhammer
morris
Armando (Dou Yiwen)
Song Ruo Jing
Island
ShenWeilong
Fu Hanxi
