Chen Jichang
9878db6765
change(parlio_tx): use shift edge instead sample edge
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Made-with: Cursor
2026-04-20 10:45:16 +08:00
Evgeny Torbin
59f62ad15f
test: format all test scripts
2026-04-17 16:01:00 +02:00
laokaiyao
4c65719482
fix(parlio_rx): fixed opposite sample edge issue
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Closes https://github.com/espressif/esp-idf/issues/18012
2026-01-15 12:04:24 +08:00
Chen Jichang
1b5f36b3c0
feat(parlio): add buffer size alignment warning for c6
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Closes https://github.com/espressif/esp-idf/issues/17970
2026-01-14 10:59:15 +08:00
laokaiyao
c3b0115ed4
ci(parlio): fixed incorrect condition in rx test case
2025-11-27 16:13:35 +08:00
Chen Jichang
3d1a110f38
refactor(gdma): move buffer aligment to buffer mount config
2025-10-14 17:24:24 +08:00
morris
fef5594966
fix(parlio): reenable parlio rx driver cache safe test
2025-04-24 10:47:11 +08:00
morris
3816f5f281
Merge branch 'fix/parlio_add_gdma_fifo_reset_v5.3' into 'release/v5.3'
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fix(parlio_tx): add clock and fifo reset in disable function (v5.3)
See merge request espressif/esp-idf!36274
2025-04-15 10:47:25 +08:00
Chen Jichang
3590ddc7f6
fix(drivers): use CPU_MAX lock in dirvers use axi dma to access psram
2025-03-13 15:42:30 +08:00
Chen Jichang
546b60f6f1
fix(parlio): fix non-free running test case
2025-03-07 19:44:23 +08:00
Chen Jichang
f3eec647aa
feat(parlio_tx): backport the clock change to v5.3
2025-02-28 15:03:11 +08:00
Chen Jichang
25f35910a7
fix(parlio): fix rempty interrupt during resetting fifo
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Move the fifo reset to after disabling the tx core clock.
And add external non-free running clock src test.
2025-02-27 15:12:33 +08:00
Chen Jichang
1ff5e64acd
fix(parlio_tx): add clock and fifo reset in disable function
2025-02-26 18:41:49 +08:00
morris
1536b00d75
fix(dma): also consider buffer alignment when calculating the DMA nodes
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Closes https://github.com/espressif/esp-idf/issues/15228
2025-02-10 17:12:22 +08:00
laokaiyao
9b4e9e7c7a
ci(parlio_rx): increase the i2s test case stability
2024-11-01 11:06:12 +08:00
laokaiyao
ea3f4ad6f0
ci(parlio_rx): bypass the spi test case
2024-11-01 11:06:12 +08:00
Chen Jichang
bf487cc290
feat(parlio_tx): support psram buffer
2024-09-11 09:52:49 +08:00
Chen Jichang
8bf4b5bbc0
fix(parlio_tx): fix error in first transfer and 1 byte transfer
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On p4, the clock was configured in the wrong order causing a dropped
count on the first transmission. And gdma eof event fails to trigger
parlio_tx eof event when transmitting single byte.
2024-09-11 09:52:49 +08:00
Chen Jichang
897e889f7b
refactor(parlio_tx): use gdma link list driver to mount buffer
2024-09-05 10:37:53 +08:00
laokaiyao
3fc2c00dab
fix(parlio): fix cache sync issue on P4
2024-07-30 19:46:35 +08:00
morris
8ae12473b5
refactor(i2s): clean up DMA buffer allocation
2024-06-12 10:16:24 +08:00
laokaiyao
dcc7cf9379
feat(parlio_rx): support parlio rx on p4
2024-05-27 17:20:15 +08:00
morris
c0289ee6eb
fix(drivers): fix typos found by codespell
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codespell components/esp_driver*
2024-03-28 10:01:27 +08:00
morris
ce041640ca
change(parlio_tx): plenty of driver clean up
2024-03-15 18:02:44 +08:00
laokaiyao
baccc61482
refactor(parlio): make parlio driver as component
2024-01-04 14:12:42 +08:00
Chen Jichang
Evgeny Torbin
laokaiyao
morris