Commit Graph
9 Commits
Author SHA1 Message Date
laokaiyao 8d0fca08a0 feat(i2s): support i2s & apll on esp32s31 2026-04-22 09:30:53 +08:00
Chen Ji Chang 83e7b11716 Merge branch 'feat/lcd_use_apll_clock' into 'master'
refactor(clk_tree): use general api to enable the clk

Closes IDF-11478 and IDF-12972

See merge request espressif/esp-idf!35952
2026-04-20 22:12:01 +08:00
Xorlent 51d059232b Fix output bit range in bitscrambler documentation
Destination bit range incorrect in `Sub-instructions` example
2026-04-17 17:20:28 +08:00
Chen Jichang 6e206dd173 refactor(clk_tree): use general api to enable the clk 2026-04-16 20:03:06 +08:00
wuzhenghui b913f147ba feat(esp_hw_support): support esp32s31 esp_clock_output 2026-04-14 12:19:07 +08:00
Song Ruo Jing 50051b74a5 feat(clk): support for esp32s31 clock tree 2026-04-02 20:39:59 +08:00
armando ebbd9cdb59 feat(psram): support psram device driver 2026-03-31 13:56:43 +08:00
Song Ruo Jing 600bf5b6d7 refactor(esp_hal_regi2c): move regi2c implementation from esp_rom to esp_hal_regi2c 2026-03-10 15:08:51 +08:00
Song Ruo Jing 62511d61e9 refactor(clk): split clock HAL into separate component 2026-01-13 15:50:20 +08:00