Commit Graph
30 Commits
Author SHA1 Message Date
Ashish Sharma b912691fcd refactor(app_update): rename SECURE_SIGNED_DATA_PARTITION Kconfig option 2026-08-12 08:39:18 +05:30
Marius Vikhammer 4d332f710e docs(kconfig): update kconfig ref links to use menuitem 2026-08-11 11:19:45 +02:00
Aditya Patwardhan bbe2a7d984 docs(security): show ECDSA-P384 Secure Boot notes only on targets supporting it
Gate these notes on SOC_SECURE_BOOT_V2_ECC in addition to the ECDSA
peripheral P-384 capability, so they are not rendered for targets
without the ECDSA Secure Boot scheme.
2026-07-15 12:40:20 +05:30
Mahavir Jain e1713f44fb Merge branch 'fix/sb_digest_revocation_workflow' into 'master'
change(bootloader): honor SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS during first boot

See merge request espressif/esp-idf!49553
2026-06-11 13:34:01 +05:30
Mahavir Jain 8da7627526 change(bootloader): honor SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS during first boot
Previously the bootloader unconditionally revoked unused secure boot key
digest slots while permanently enabling secure boot on the first boot,
ignoring CONFIG_SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS. Now the config is
honored on this path too: when set, the unused digest slots are left
un-revoked. This is safe as long as the debug and download interfaces are
disabled.

Update the Kconfig help and the Secure Boot v2 guide (en and zh_CN)
accordingly.
2026-06-10 13:09:10 +05:30
Aditya Patwardhan 67e10e2b56 change(secure_boot): mark ECDSA based Secure Boot V2 as insecure on affected SoCs
ECDSA based Secure Boot V2 is not functional for certain input vectors on
ESP32-C5/C61/H2/P4 and on the preview targets ESP32-H4/H21. RSA based Secure
Boot V2 is the recommended scheme where the SoC supports it. This issue will be
fixed in a future hardware ECO revision; more details will be shared through the
hardware errata document.

A new hidden Kconfig option SECURE_BOOT_V2_ECDSA_INSECURE marks the affected
mass-production SoCs (ESP32-C5/C61/H2/P4). On these SoCs, when hardware Secure
Boot V2 is enabled, the ECDSA (V2) signing scheme is no longer offered by
default; it must be turned on explicitly via SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
under "Allow potentially insecure options" (CONFIG_SECURE_BOOT_INSECURE). App
signing without hardware Secure Boot is not affected. Note that ESP32-C61 has no
RSA based Secure Boot V2, so it has no Secure Boot scheme enabled by default.

The preview targets ESP32-H4 and ESP32-H21 mark ECDSA Secure Boot V2 as not
supported in their SoC capabilities instead of using the option above. As
ESP32-H4 has no other Secure Boot V2 scheme, Secure Boot is disabled entirely on
it; ESP32-H21 retains RSA based Secure Boot V2.

The security documentation keeps the ECDSA Secure Boot V2 content visible and
adds a warning describing the limitation (including that ECDSA Secure Boot V2 on
ESP32-C61 is not recommended for production). CI apps that exercise ECDSA Secure
Boot V2 on the affected SoCs set CONFIG_SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
accordingly.
2026-06-09 16:55:57 +05:30
renpeiying d771b41400 docs: Update translation for security docs 2026-05-15 10:46:59 +08:00
nilesh.kale 76e2e6d53f feat: enable support for secure boot in esp32h4 2026-05-11 16:26:01 +05:30
Ashish Sharma cd38d68bd1 feat(bootloader_support): remove P192 curve support 2026-04-30 18:04:00 +08:00
nilesh.kale 85b5e6a231 fix: added reference to example security/security_features_app in docs 2026-04-01 13:54:34 +05:30
Zhang Shuxian 86403c2cfc docs: Update CN translation for name change 2026-03-24 17:16:56 +08:00
Ashish Sharma abe0d37d94 docs(security): adds data partition verification docs 2026-03-04 10:22:33 +08:00
Zheng Zhong 0c0b9c7d89 docs: fix some description in security guide docs 2025-12-01 14:24:51 +08:00
Peter Dragun e3198fff3c feat: Update esptool to v5 2025-09-30 15:28:55 +02:00
Zhang Shuxian ff8c82169f docs: Correct wrong description in secure-boot-v2.rst 2025-09-26 17:23:05 +08:00
Zhang Shuxian b615ab5a40 docs: Update CN translation for secure boot 2025-07-22 19:14:46 +08:00
Zhang Shuxian 111e453c4d docs: Update CN translation for Secure Boot 2025-04-30 14:20:45 +08:00
harshal.patil 75fd14efbc fix(docs): Fix unterminated quotes in secure-boot-v2.rst 2025-04-21 11:18:22 +05:30
shenmengjing 29a7146b12 docs: Update CN translation for secure-boot-v2.rst 2024-12-20 11:24:49 +08:00
shenmengjing 6f86f70f0a docs: Sync CN and EN files 2024-11-05 18:03:42 +08:00
renpeiying 46770a50a6 docs: standardize the names of bootloaders in esp-idf 2024-10-23 11:29:24 +08:00
Zhang Shuxian 808a82de81 docs: Update CN translation for secure-boot-v2.rst 2024-10-08 11:09:40 +08:00
nilesh.kale 1011cee7a7 feat: udpate security docs for c61 and c5
This commit update security documents for ESP32C61.
2024-09-02 11:04:38 +05:30
harshal.patilandZhang Shuxian 03a15664ee change(bootloader_support/secure_boot): Improve description of the config SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
Co-authored-by: Zhang Shuxian <zhangshuxian@espressif.com>
2024-08-21 16:32:54 +05:30
Mahavir Jain 3ec400b332 docs(security): fix ESP32-C3 minimum supported revision for secure boot v2
Closes https://github.com/espressif/esp-idf/issues/14377
2024-08-16 15:04:28 +05:30
shenmengjing 2cf95ac406 docs: Enable secure boot for c5 in CN translation 2024-07-09 10:42:53 +08:00
harshal.patil 4d6cb7bf23 docs(secure_boot): Add secure boot signature verification time for esp32p4 2024-06-21 21:59:55 +05:30
caixinying-git 64dca12e76 docs: provide CN translation for security/secure-boot-v2.rst 2024-06-06 12:16:08 +08:00
kirill.chalov 22a053f1fc docs(sphinx-lint): Fix issues reported by sphinx-lint before adding it to pre-commit 2024-01-23 15:22:29 +08:00
Supreet Deshpande 073ba0a608 feat/secure_boot_v2: Adding docs for secure boot v2 ESP32-ECO3 2020-02-25 01:28:22 +05:30