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571 Commits

Author SHA1 Message Date
C.S.M
11216d293a fix(i2c): Fix that fsm reset cause i2c scl frequency changed on esp32s2 2025-04-29 17:30:34 +08:00
laokaiyao
5fe51c4bb7 fix(touch): fixed tie option take no effect 2025-04-21 20:48:12 +08:00
diplfranzhoepfinger
19804886df fix(twai): fixed twai assert fail when recover 
driver try start new frame in ISR however already bus off

Closes https://github.com/espressif/esp-idf/issues/9697
 2025-03-25 11:48:37 +08:00
Song Ruo Jing
8fd103928b fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32 
Closes https://github.com/espressif/esp-idf/issues/14931
 2025-03-20 16:01:44 +08:00
morris
899b08a033 Merge branch 'bugfix/lp_uart_baudrate_limitation_v5.2' into 'release/v5.2' 
fix(uart): LP UART does not have the pre-divider for its clock source (v5.2)

See merge request espressif/esp-idf!37596
 2025-03-17 11:06:13 +08:00
Song Ruo Jing
ce808b09cd fix(uart): LP UART does not have the pre-divider for its clock source 
Closes https://github.com/espressif/esp-idf/issues/15427
 2025-03-07 21:49:20 +08:00
Song Ruo Jing
2c9fa3771e fix(ledc): left-off gamma ram registers should be cleared 
Hardware reads in (range_number+1) fade parameter registers, which could
cause output waveform error.
 2025-03-07 17:31:08 +08:00
morris
e6f49c0480 Merge branch 'feat/spi_std_timing_and_bit_trans_v5.2' into 'release/v5.2' 
feat(driver_spi): support adjust master rx to standard timing (v5.2)

See merge request espressif/esp-idf!36401
 2025-02-28 18:40:13 +08:00
Aditya Patwardhan
4c281f8eee Merge branch 'feature/esp32h2_eco5_ecc_v5.2' into 'release/v5.2' 
feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 (v5.2)

See merge request espressif/esp-idf!36586
 2025-02-11 09:54:03 +08:00
Aditya Patwardhan
9b8a21d128 fix(soc): Fixed ECDSA register compatibility 2025-02-10 21:25:06 +05:30
Mahavir Jain
84d2a8818c feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 2025-02-06 08:14:50 +05:30
wanckl
65a616197f feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing 2025-01-22 11:11:47 +08:00
harshal.patil
248de17a53 feat(hal/spi_flash_encrypted): Enable pseudo rounds function during XTS-AES operations 2025-01-17 14:18:37 +05:30
harshal.patil
e8a0496d36 feat(hal/aes): Enable pseudo rounds function during AES operations 2025-01-17 14:00:14 +05:30
morris
5d2609911e Merge branch 'fix/twai_io_init_glitch_v5.2' into 'release/v5.2' 
fix(driver_twai): fixed bus-off when twai_init due to wrong gpio config (v5.2)

See merge request espressif/esp-idf!34817
 2025-01-14 11:56:22 +08:00
wanckl
a863380698 fix(driver_spi): fixed slave no dma rx overwrite when trans_len below or over 
Closes https://github.com/espressif/esp-idf/issues/14462
 2025-01-09 11:53:53 +08:00
wanckl
c3df56b53e fix(esp_adc): fixed adc continue monitor don't work issue 
Closes https://github.com/espressif/esp-idf/issues/14769
Closes https://github.com/espressif/esp-idf/issues/14814
 2025-01-06 21:09:53 +08:00
Zhuang Hang
1ef5e3f3a3 feat(802.15.4): add api for set/get ack timeout (v5.2) 2025-01-02 12:53:10 +08:00
wanckl
7a1588ec7f fix(twai): currect twai type macro initialize definition 2024-12-26 15:58:36 +08:00
Aditya Patwardhan
5b6d8812d1 feat(hal): Add countermeasure for ECDSA generate signature 
The ECDSA peripheral before ECO5 of esp32h2 does not perform the ECDSA
    sign operation in constant time. This allows an attacker to read the
    power signature of the ECDSA sign operation and then calculate the
    ECDSA key stored inside the eFuse. The commit adds a countermeasure
    for this attack. In this case the real ECDSA sign operation is
    masked under dummy ECDSA sign operations to hide its real power
    signature
 2024-09-23 19:28:12 +05:30
laokaiyao
e5393c6e2e feat(bootloader): support to check efuse block revision 
change(bootloader): remove ignore efuse check flag (temp)

change(bootloader): use int for the minimum efuse blk rev (temp)
 2024-08-28 12:12:54 +08:00
Cao Sen Miao
a44f8179de refactor(i2c): Add reset and clock control to i2c ll layer 2024-07-04 12:29:05 +08:00
morris
4e7dd0ce2b fix(lcd): build errors with deprecated lcd types in cpp 
Closes https://github.com/espressif/esp-idf/issues/14029
 2024-06-24 11:57:40 +08:00
morris
f0a69d8a0c Merge branch 'feature/usb_host_hub_support_collective_backport_v5.2' into 'release/v5.2' 
refactor(usb/host): Prerequisite Refactoring For Hub Collective backport (v5.2)

See merge request espressif/esp-idf!29448
 2024-06-07 13:12:51 +08:00
Darian Leung
36de16d97c refactor(hal/usb): Add new USB PHY related HAL API 
This commit adds/updates the USB PHY related HAL APIs. The following changes
are made:

- Updated 'usb_wrap_hal.h' API
- Added 'usb_serial_jtag_hal.h' API
 2024-06-04 20:35:49 +08:00
Darian Leung
d944e85a57 feat(hal/usb): Update USB WRAP and USJ LL 
- Added LL cap macros to distinguish feature differences between the LLs of
  different targets:
    - '..._LL_EXT_PHY_SUPPORTED' indicates whether the USB WRAP/USJ supports
      routing to an external FSLS PHY.
- Tidied up some RCC LL functions and their callers.
- Added 'usb_wrap_types.h' and 'usb_serial_jtag_types.h' to provide types used
  in LLs.
- Fixed some spelling/naming issues as part of code-spell pre-commit
 2024-06-04 20:35:49 +08:00
Darian Leung
81f6d7abbe refactor(hal/usb): Remove usb_fsls_phy_ll.h 
For targets that only contain a USJ peripheral (and not a DWC OTG), their
'usb_fsls_phy_ll.h' headers only contain a single function
('usb_fsls_phy_ll_int_jtag_enable()') whose feature is already covered by
functions in 'usb_serial_jtag_ll.h'. Thus, this header is redundant.

This commit does the following:

- Remove 'usb_fsls_phy_ll.h' for targets that only contain a USJ peripheral
- Rename 'usb_fsls_phy_[hal|ll].[h|c]' to `usb_wrap_[hal|ll].[h|c]` for targets
that contain a DWC OTG peripheral. This better reflects the underlying peripheral
that the LL header accesses.
 2024-06-04 20:35:47 +08:00
Darian Leung
0c8ec63c10 refactor(usb/hcd): Allow port resets with allocated pipes 
This commit updates the HCD API to allow port resets to occur even if pipes
are allocated. The pipes cannot be active and the port reset will simply
restore the pipes (by reinitializing their channel registers) following the
reset.

Changes:

- Allow port resets while channels are allocated
- Remove pipe persistance API 'hcd_pipe_set_persist_reset()'
 2024-06-04 20:34:56 +08:00
Marius Vikhammer
bbe00b9ee3 docs(doxygen): fix misc issues with new version of doxygen 2024-05-30 13:42:18 +08:00
harshal.patil
85186042c3 feat(hal/ecdsa): Add HAL API for operation successful check 2024-04-11 12:33:06 +05:30
Cao Sen Miao
7c233ebc80 feat(i2c_master): Add parameter to config I2C scl await time 2024-04-07 15:06:31 +08:00
Cao Sen Miao
ae94c0134b fix(i2c_master): Fix issue that i2c clock got wrong after reset, 
Closes https://github.com/espressif/esp-idf/issues/13397
 2024-04-01 10:55:39 +08:00
Tomas Rezucha
e3f811b5b8 feat(usb/host): Update ISOC scheduler for HS endpoints 
USB-OTG uses 'sched_info' field of HCTSIZ register to schedule transactions
in USB microframes.
 2024-03-04 10:00:35 +01:00
gaoxu
94ef39472b fix(adc): workaround to fix adc continuous get less results on c3 2024-02-21 13:38:46 +08:00
morris
7fafe4a9f4 Merge branch 'feature/usb_host_collective_backport_v5.2' into 'release/v5.2' 
USB Host: Collective backport to v5.2

See merge request espressif/esp-idf!28095
 2024-02-20 18:51:26 +08:00
zwx
3a9bf62ed6 fix(802154): fix pending tx will be delayed issue 2024-02-20 10:32:00 +08:00
zwx
f978fc10c0 feat(802.15.4): introduce pending tx while rx feature 2024-02-20 10:31:29 +08:00
Darian Leung
86fb02efa4 refactor(hal): Remove usb_hal and usb_ll 
This commit removes some legacy USB related HAL and LL files that are no longer
used.
 2024-02-19 15:45:03 +08:00
Tomas Rezucha
f57ef07e14 feat(usb/host): Calculate FIFO sizes based on USB configuration 2024-02-19 15:45:02 +08:00
Darian Leung
f0219b73f9 refactor(hal/usb): Rename usb_fsls_phy API to match header/source names 
Note: Also fixed some formatting issues in usb_wrap_struct.h
 2024-02-19 15:45:02 +08:00
Darian Leung
f2ede42191 refactor(hal/usb): Rename usb_phy files to usb_fsls_phy 
This commit renames USB PHY related HAL files from "usb_phy_xxx" to
"usb_fsls_phy_xxx" since they are only designed to support Full-Speed/Low-Speed
Serial USB PHYs. This renmaing is done to accommodate future USB PHYs that use
other PHY interfaces (e.g., UTMI, ULPI etc).
 2024-02-19 15:45:01 +08:00
Darian Leung
c1f0823795 refactor(hal/usb): Remove usage of old USB OTG config macros 2024-02-19 15:45:01 +08:00
Darian Leung
d08b90c5cc refactor(soc/host): Update USB OTG struct fields 
This commit updates the "*_struct.h" files for the USB OTG peripheral:

- Added/removed some missing/non-existing register fields
- Added "reserved" place holders for registers that are missing due to IP
configuration.
- Added "usb_dwc_cfg.h" listing the USB OTG IP configuration for each target.
- Updated LL/HAL according to register field updates. Also tidied up the include
directives in those headers.
 2024-02-19 15:45:00 +08:00
Tomas Rezucha
1e2c271bd0 fix(usb/host): Correctly parse bInterval field in HighSpeed EP descriptors 
For LS and FS interrupt endpoint: interval = bInterval
For isochronous and HS interrupt endpoint: interval = 2^(bInterval-1)
 2024-02-19 15:44:59 +08:00
morris
8d2c1a6265 Merge branch 'bugfix/fix_integral_div_calc_in_hal_util_v5.2' into 'release/v5.2' 
fix(hal_utils): add division range check in integral algorithm (v5.2)

See merge request espressif/esp-idf!28628
 2024-02-18 16:08:17 +08:00
morris
eae7bba46f Merge branch 'feature/usb_hs_support_v5.2' into 'release/v5.2' 
feat(usb/host): Add High Speed enumeration types (backport v5.2)

See merge request espressif/esp-idf!28058
 2024-02-18 10:57:33 +08:00
laokaiyao
03fb722ca5 fix(hal_utils): add division range check in integral algorithm 2024-01-31 12:06:43 +08:00
Jiang Jiang Jian
99d10ca3d2 Merge branch 'change/change_regdma_power_issue_macro_v5.2' into 'release/v5.2' 
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (backport v5.2)

See merge request espressif/esp-idf!27992
 2023-12-25 20:38:48 +08:00
Tomas Rezucha
9b40d39120 refactor(usb/host): Move FIFO size configuration to HAL layer 
The logic of calculating FIFO sizes is DWC OTG specific.
We move it to the HAL layer to provide better abstraction in the HDC layer.
 2023-12-21 10:34:56 +01:00
Tomas Rezucha
71cd4df75a refactor(usb/host): Make private hal types USB_DWC specific 2023-12-21 10:34:46 +01:00