Commit Graph

187 Commits

Author SHA1 Message Date
nilesh.kale
446c4fb6c3 fix(bootloader_support): enable XTS-AES pseudo rounds for ESP32-P4
Burn XTS_DPA_PSEUDO_LEVEL efuse on P4 (rev >= 3.0) as done for other targets.
2026-07-17 15:15:50 +05:30
nilesh.kale
7ef8b58873 fix(bootloader_support): set SECURE_BOOT_SHA384_EN eFuse on ESP32-P4
Set SECURE_BOOT_SHA384_EN when enabling ECDSA-P384 Secure Boot V2 on
ESP32-P4, as done on C5/H4/S31, so that ROM verifies the bootloader
using the SHA-384 scheme. The eFuse exists only on the rev >= v3.0
eFuse table, so the Kconfig option is gated on rev >= v3.0.
2026-07-17 15:15:50 +05:30
Mahavir Jain
b08669af99 change(bootloader): honor SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS during first boot
Previously the bootloader unconditionally revoked unused secure boot key
digest slots while permanently enabling secure boot on the first boot,
ignoring CONFIG_SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS. Now the config is
honored on this path too: when set, the unused digest slots are left
un-revoked. This is safe as long as the debug and download interfaces are
disabled.

Update the Kconfig help and the Secure Boot v2 guide (en and zh_CN)
accordingly.
2026-06-16 13:29:49 +05:30
Aditya Patwardhan
4f2f37ca69 change(secure_boot): mark ECDSA based Secure Boot V2 as insecure on affected SoCs
ECDSA based Secure Boot V2 is not functional for certain input vectors on
ESP32-C5/C61/H2/P4 and on the preview targets ESP32-H4/H21. RSA based Secure
Boot V2 is the recommended scheme where the SoC supports it. This issue will be
fixed in a future hardware ECO revision; more details will be shared through the
hardware errata document.

A new hidden Kconfig option SECURE_BOOT_V2_ECDSA_INSECURE marks the affected
mass-production SoCs (ESP32-C5/C61/H2/P4). On these SoCs, when hardware Secure
Boot V2 is enabled, the ECDSA (V2) signing scheme is no longer offered by
default; it must be turned on explicitly via SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
under "Allow potentially insecure options" (CONFIG_SECURE_BOOT_INSECURE). App
signing without hardware Secure Boot is not affected. Note that ESP32-C61 has no
RSA based Secure Boot V2, so it has no Secure Boot scheme enabled by default.

The preview targets ESP32-H4 and ESP32-H21 mark ECDSA Secure Boot V2 as not
supported in their SoC capabilities instead of using the option above. As
ESP32-H4 has no other Secure Boot V2 scheme, Secure Boot is disabled entirely on
it; ESP32-H21 retains RSA based Secure Boot V2.

The security documentation keeps the ECDSA Secure Boot V2 content visible and
adds a warning describing the limitation (including that ECDSA Secure Boot V2 on
ESP32-C61 is not recommended for production). CI apps that exercise ECDSA Secure
Boot V2 on the affected SoCs set CONFIG_SECURE_BOOT_V2_FORCE_ENABLE_ECDSA
accordingly.
2026-06-10 03:10:27 +05:30
Ashish Sharma
cd38d68bd1 feat(bootloader_support): remove P192 curve support 2026-04-30 18:04:00 +08:00
Marius Vikhammer
6af582c260 change(rom): add rom caps for bootloader in flash offset 2026-04-29 10:58:50 +08:00
hebinglin
474d89b4c2 fix(clk): update H21 ECO1 to use 64MHz clock for mspi 2026-03-25 15:38:49 +08:00
Meet Patel
c4e2fe2c8b refactor(system): guard WDT with SoC capability macros
Wrap MWDT-related code under SOC_WDT_SUPPORTED so targets without a main
watchdog can compile.

Add SOC_RTC_WDT_SUPPORTED for RTC watchdog usage (bootloader, slow-clock
paths) and regenerate Kconfig.soc_caps.in. Bootloader RWDT setup stays
under SOC_RTC_WDT_SUPPORTED; MWDT flashboot teardown stays under
SOC_WDT_SUPPORTED.

ESP_INT_WDT, ESP_TASK_WDT_EN, and BOOTLOADER_WDT_ENABLE depend on
SOC_WDT_SUPPORTED where applicable. Build xt_wdt.c only when
SOC_XT_WDT_SUPPORTED. Provide no-op panic WDT helpers when
SOC_WDT_SUPPORTED is disabled.
2026-03-24 14:57:43 +05:30
Ashish Sharma
d8b02883dc fix(secure_boot): marks 192 bit support curve legacy 2026-03-17 10:25:44 +08:00
nilesh.kale
10cbacfb19 fix(bootloader_support): added ecdsa curve validation during secure boot
This commit added ECDSA key curve validation between
curve selected in menuconfig and key provided.
2026-03-03 12:53:27 +05:30
Song Ruo Jing
215c9993bf fix(clk): update H4 to use 64MHz clock for mspi
And add pll clock ref count
2026-01-04 14:07:01 +08:00
Chen Jichang
8702d5c986 feat(clk): support clk tree on h4mp 2026-01-04 14:07:01 +08:00
Mahavir Jain
5979ca3d14 feat(bootloader): add config to force secure boot already init case
Mostly helpful in testing scenarios. The newly added config
SECURE_BOOT_REQUIRE_ALREADY_ENABLED will ensure the SB feature must
already be enabled, otherwise the bootloader simply fails to boot.
2025-12-30 10:06:51 +05:30
C.S.M
0c4cf75c35 feat(esp32s31): Introduce esp32s31 hello world 2025-12-02 10:44:16 +08:00
Harshal Patil
0debe71b3d Merge branch 'feat/flash_enc_using_key_manager' into 'master'
Support Flash Encryption using Key Manager

Closes IDF-13462 and IDF-14278

See merge request espressif/esp-idf!41879
2025-11-13 07:55:15 +05:30
harshal.patil
0c3c284819 feat(bootloader_support): Support FE XTS-AES-256 using Key Manager for ESP32-C5 2025-11-11 12:23:27 +05:30
harshal.patil
8abea3c537 feat(bootloader_support): Support Flash Encryption using Key Manager 2025-11-11 12:23:25 +05:30
harshal.patil
3090e91e60 fix(esp_security): Set WR_DIS_SECURE_BOOT_SHA384_EN by default when
Flash Encryption Release mode is enabled and Secure Boot P384 scheme not is enabled.
2025-11-05 08:39:55 +05:30
Peter Dragun
e3198fff3c feat: Update esptool to v5 2025-09-30 15:28:55 +02:00
Mahavir Jain
343fd79462 Merge branch 'fix/allow_pre_programmed_efuse_pseudo_round_level_when_set_release_mode' into 'master'
Allow pre-programmed XTS-AES psuedo round level efuses

See merge request espressif/esp-idf!42041
2025-09-30 11:09:43 +05:30
harshal.patil
6be7a17ce0 fix(bootloader_support): Allow pre-programmed XTS-AES psuedo round level efuses
- The API esp_flash_encryption_set_release_mode() by defualt programs
the XTS-AES pseudo round level efuse to level low but did not considered
any existing value that would have been programmed in the efuse bit.
2025-09-19 13:55:50 +05:30
harshal.patil
d6c1184676 fix(bootloader_support): Reorder write protection bits of some shared security efuses 2025-09-19 13:02:00 +05:30
Mahavir Jain
e46313568b fix(bootloader): correct encryption length for secure update without secure boot
For secure update without secure boot case, the encryption length for
app image must consider signature block length as well. This was
correctly handled for secure boot case but not for secure update without
secure boot.
2025-09-15 12:31:56 +05:30
armando
179d00a6f8 feat(p4): p4 rev3 real chip support 2025-08-28 17:56:16 +08:00
yanzihan@espressif.com
d4a821a03e feat(clk): add 100m/200m/400m cpu freq & change clk cal & change blk version 2025-08-28 17:40:37 +08:00
harshal.patil
130e72f82b feat(bootloader_support): Support Secure Boot using ECDSA-P384 curve 2025-07-21 09:19:42 +05:30
Song Ruo Jing
b3fd9b6afa fix(clk): XTAL_X2 clock is not usable on H21 MPW and H4 BETA5 2025-07-10 16:35:58 +08:00
Song Ruo Jing
28df79aee8 feat(clk): Add basic clock support for esp32h4 2025-07-10 16:35:53 +08:00
Marius Vikhammer
3751479217 change(bootloader): removed support for CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE 2025-07-04 12:16:57 +08:00
harshal.patil
8de2eb01da fix(bootlaoder): Fix documentation as ESP32 does not support secure download mode 2025-06-20 10:50:28 +05:30
Chen Jichang
45ba78940f feat(esp32h4): finnal introduce hello world 2025-03-19 18:48:41 +08:00
nilesh.kale
652879ff06 feat: enable flash encryption support for esp32h21 2025-03-13 10:37:11 +05:30
harshal.patil
a6ea9bcd41 fix(secure_boot): Fix SB verification failure when sig block and key digest mismatch
- Secure boot V2 verification failed when multiple keys are used to sign the bootloader
  and the application is signed with a key other than the first key that is used to
  sign the bootloader.
- The issue was introduced as a regression from the commit `ff16ce43`.
- Added a QEMU test for recreating the issue.
- Made SECURE_BOOT_FLASH_BOOTLOADER_DEFAULT independent of SECURE_BOOT_BUILD_SIGNED_BINARIES.
2025-03-04 11:26:51 +05:30
Mahavir Jain
6a4a124d65 Merge branch 'feature/enable_rsa_based_secure_boot_for_c5_eco1' into 'master'
feat(bootloader_support): enabled RSA based secure boot scheme for ESP32C5 ECO1

Closes IDF-10453 and IDF-11441

See merge request espressif/esp-idf!35104
2024-12-04 18:00:34 +08:00
nilesh.kale
1e11340061 feat(bootloader_support): enabled RSA based secure boot scheme for ESP32C5 ECO1
This commit enabled RSA based secure boot scheme for ESP32C5 ECO1 module.
This update also adds a check to ensure the selected secure boot scheme is
valid for ECO0 modules.
2024-12-03 16:48:56 +05:30
harshal.patil
f02dc64ce6 feat(bootloader_support): Permanently enable pseudo rounds function for XTS-AES during start-up 2024-12-03 11:17:54 +05:30
Konstantin Kondrashov
816a0da0fd feat(bootloader): Adds bootloader anti rollback configs 2024-11-08 13:53:24 +02:00
Konstantin Kondrashov
bb329c4e53 feat(bootloader): Move rollback configs into a separate menu 2024-11-07 19:25:58 +02:00
Guillaume Souchere
ab4e658af6 fix(bootloader): Update pin range for factory reset and app test
Update the range for pin selection of BOOTLOADER_NUM_PIN_APP_TEST
and BOOTLOADER_NUM_PIN_FACTORY_RESET based on the selected target.

Closes https://github.com/espressif/esp-idf/issues/14508
2024-09-06 07:18:46 +02:00
Marius Vikhammer
289ceff0e0 docs(build): update comments regarding -Os/Oz for kconfig compiler option 2024-08-27 13:41:34 +08:00
harshal.patil
03a15664ee change(bootloader_support/secure_boot): Improve description of the config SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
Co-authored-by: Zhang Shuxian <zhangshuxian@espressif.com>
2024-08-21 16:32:54 +05:30
Jan Beran
01ee296db0 fix: fix various errors in Kconfig files 2024-07-17 11:33:22 +02:00
Mahavir Jain
6669caf4cf Merge branch 'feature/esp32c5_memory_protection' into 'master'
Support memory protection using PMA and PMP for ESP32-C5

Closes IDF-8833

See merge request espressif/esp-idf!31245
2024-06-26 19:18:39 +08:00
harshal.patil
84afc6a955 feat(esp_hw_support): Support memory protection using PMA and PMP for ESP32-C5 2024-06-25 11:55:15 +05:30
Konstantin Kondrashov
ee605e35b4 feat(bootloader): BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP for C2 (without RTC_MEM) 2024-06-25 02:09:59 +08:00
C.S.M
374c89097f feat(spi_flash): Adjust flash clock to real 80M clock, and support 32bit address on eco1 2024-05-27 19:42:47 +08:00
Konstantin Kondrashov
4ad9ad8086 feat(log): Adds new timestamp APIs and bootloader log Kconfigs 2024-05-21 17:22:34 +03:00
Xiaoyu Liu
1db02e48ef fix(bootloader): fix spelling errors in /components/bootloader/Kconfig.projbuild 2024-03-29 10:59:46 +08:00
Jiang Jiang Jian
e1a5633e18 Merge branch 'bugfix/bootloader_custom_rtc_data_crc_master' into 'master'
fix(bootloader): add legacy retained memory CRC calculation

Closes IDFGH-11747

See merge request espressif/esp-idf!28934
2024-02-21 10:39:14 +08:00
harshal.patil
f4581d7103 docs(secure_boot_v2): Specify the workflow to disable revocation of unused key digests slots 2024-02-15 14:31:41 +05:30