The GDMA layer used `max_data_burst_size == 0` as the only way to disable the
data burst. That conflicts with the upstream drivers' convention where a zeroed
config struct means "unset", so users had no way to ask for the driver default
burst size.
GDMA now treats both 0 and 1 as "no data burst": a single-beat burst has no
benefit over the non-burst mode. The MSPI alignment constraint under Flash
Encryption / PSRAM ECC still takes precedence and is reported with a warning.
The upstream drivers using GDMA now apply their own default burst size (16
bytes) when the user leaves `dma_burst_size` as 0, following the UHCI driver:
- esp_async_crc (AHB / AXI GDMA backend)
- esp_async_memcpy (AHB / AXI / LP-AHB / DW_GDMA backend)
Callers that really want no burst can now set `dma_burst_size` to 1.
Configure the shared LCDCAM core clock through guarded LCD and CAM LL APIs,
and unify LCD functional clock LL calls around group IDs across supported targets.
Co-authored-by: Cursor <cursoragent@cursor.com>
Remove ~50 duplicate local definitions of ALIGN_UP/ALIGN_DOWN/ALIGN_UP_BY/
ALIGN_DOWN_BY across the codebase and replace them with canonical
ESP_ALIGN_UP/ESP_ALIGN_DOWN from esp_macros.h.
- Removed conditional definitions for various RCC_ATOMIC macros across
multiple files, replacing them with a unified PERIPH_RCC_ATOMIC() macro.
- Updated instances where specific RCC_ATOMIC macros were used to ensure
consistent usage of PERIPH_RCC_ATOMIC().
- Deleted unused uart_share_hw_ctrl.h file as its functionality is now
integrated into the new structure.
feat(esp_driver_cam): DVP driver supports only initializing the clock and XCLK pin to generate a clock for the external device
Closes IDF-13385
See merge request espressif/esp-idf!39837
morris
Chen Jichang
wuzhenghui
gaoxu
Dong Heng
armando
Marius Vikhammer
Alexey Lapshin