armando
|
eafff2552b
|
feat(p4): p4 rev3 soc support
|
2025-09-22 01:10:02 +00:00 |
|
morris
|
e1694c6ade
|
fix(twai): busoff and clkout may not available in SOC
return ESP_ERR_NOT_SUPPORTED if these signals are required from user but
not available in SOC
|
2025-09-08 17:39:38 +08:00 |
|
Mahavir Jain
|
7d8bed20f2
|
Merge branch 'change/ecdsa_does_not_use_mpi_esp32h2_eco5_v5.5' into 'release/v5.5'
The ECDSA module of ESP32-H2 ECO5 does not use the MPI module (v5.5)
See merge request espressif/esp-idf!41215
|
2025-09-02 09:12:07 +05:30 |
|
morris
|
e9790c04fa
|
Merge branch 'features/twai_ll_parse_frame_v5.5' into 'release/v5.5'
refactor(twai): Separate frame header and data parsing logic for Classic TWAI (v5.5)
See merge request espressif/esp-idf!41478
|
2025-09-02 09:49:07 +08:00 |
|
morris
|
d3177152b3
|
Merge branch 'bugfix/gpio_esp32_workaround_v5.5' into 'release/v5.5'
fix(gpio): fix ESP32 GPIO sleep mode handling (v5.5)
See merge request espressif/esp-idf!41214
|
2025-09-01 14:54:37 +08:00 |
|
morris
|
9244d4b6cc
|
Merge branch 'bugfix/ledc_update_duty_wait_v5.5' into 'release/v5.5'
fix(ledc): duty_start bit should wait for its self-clear before next set on esp32 (v5.5)
See merge request espressif/esp-idf!41272
|
2025-09-01 14:53:43 +08:00 |
|
Jiang Jiang Jian
|
d421c9963e
|
Merge branch 'feat/support_c5_c61_clkoutput_v5.5' into 'release/v5.5'
feat(esp_hw_support): support clock output feature on esp32c5/esp32c61 (v5.5)
See merge request espressif/esp-idf!41108
|
2025-09-01 14:43:15 +08:00 |
|
Jiang Jiang Jian
|
3e9d20f6d5
|
Merge branch 'fix/fix_lightsleep_pd_modem_breaks_common_fe_clock_v5.5' into 'release/v5.5'
fix(esp_hw_support): fix lightsleep pd modem breaks common fe clock (v5.5)
See merge request espressif/esp-idf!41110
|
2025-09-01 14:42:50 +08:00 |
|
Yuan Yu
|
9b99477852
|
refactor(twai): Optimize the TWAI frame parsing function and separate frame header and data parsing logic
|
2025-08-25 12:06:31 +08:00 |
|
Jiang Jiang Jian
|
ae2b5af875
|
Merge branch 'bugfix/add_phy_calibration_independent_support_v5.5' into 'release/v5.5'
feat(phy): add phy calibration independent support(backport v5.5)
See merge request espressif/esp-idf!41416
|
2025-08-22 17:52:32 +08:00 |
|
yinqingzhao
|
5714153832
|
feat(phy): add phy calibration independent support
|
2025-08-22 10:49:23 +08:00 |
|
armando
|
17a23d1ddb
|
fix(psram): fixed psram cross page issue
|
2025-08-22 00:02:06 +08:00 |
|
Jiang Jiang Jian
|
02c5f2dbb9
|
Merge branch 'fix/disable_efuse_xts_aes_256_esp32c5_v5.5' into 'release/v5.5'
Disable XTS-AES-256 using efuse key for ESP32-C5 (v5.5)
See merge request espressif/esp-idf!41364
|
2025-08-21 10:31:37 +08:00 |
|
Jiang Jiang Jian
|
7b478f3ec8
|
Merge branch 'fix/fix_psram_incr16_v5.5' into 'release/v5.5'
fix(dma): add burst size check when dma access psram (v5.5)
See merge request espressif/esp-idf!41107
|
2025-08-20 14:01:36 +08:00 |
|
Jiang Jiang Jian
|
4f8f9748f6
|
Merge branch 'bugfix/psram_enc_workaround_v5.5' into 'release/v5.5'
fix(psram): provide boot warning about PSRAM encryption issue on C5/C61 (v5.5)
See merge request espressif/esp-idf!41163
|
2025-08-20 10:21:43 +08:00 |
|
harshal.patil
|
4213e41bbd
|
fix(soc): Disable XTS-AES-256 using efuse key for ESP32-C5
|
2025-08-19 21:59:34 +05:30 |
|
Chen Jichang
|
333858e57b
|
fix(dma): add burst size check when dma access psram
|
2025-08-15 15:37:52 +08:00 |
|
Song Ruo Jing
|
723a926b26
|
fix(ledc): duty_start bit should wait for its self-clear before next set on esp32
|
2025-08-14 18:56:34 +08:00 |
|
harshal.patil
|
f6f15bf91a
|
change(mbedtls/ecdsa): The ECDSA module of ESP32-H2 ECO5 does not use MPI module
|
2025-08-13 18:53:19 +05:30 |
|
Song Ruo Jing
|
2292bd6473
|
fix(lp_io): w1ts/w1tc register access performance is improved
by avoiding "read-modify-write" operation. The registers designed to be
write only.
|
2025-08-13 20:40:02 +08:00 |
|
Song Ruo Jing
|
54534c8637
|
fix(gpio): fix ESP32 GPIO sleep mode handling
The previous workaround does not work, the backup/restore should apply to RTC IO registers.
|
2025-08-13 20:27:55 +08:00 |
|
Mahavir Jain
|
2829481eb6
|
fix(psram): provide boot warning about PSRAM encryption issue on C5/C61
For C5/C61 revision 1.0, PSRAM encryption has hardware issue. This will
be addressed in future silicon version. Add explicit warning about this.
|
2025-08-11 13:46:38 +05:30 |
|
wuzhenghui
|
521c7fb951
|
fix(hal): fix esp32c5 mac link bad trigger
|
2025-08-08 17:00:46 +08:00 |
|
wuzhenghui
|
6a5a2fa92a
|
fix(esp_hw_support): fix MODEM_ADC_COMMON_FE destroyed by modem powerdown lightsleep
|
2025-08-08 11:45:41 +08:00 |
|
wuzhenghui
|
cafe454113
|
feat(esp_hw_support): support clock output feature on esp32c5/esp32c61
|
2025-08-08 11:36:28 +08:00 |
|
Michael (XIAO Xufeng)
|
0be09bc38e
|
Merge branch 'feat/c5_flash_timing_tuning_v5.5' into 'release/v5.5'
flash: flash timing tuning support on c5 (v5.5)
See merge request espressif/esp-idf!40879
|
2025-08-01 17:20:08 +08:00 |
|
Jiang Jiang Jian
|
f365dbe2ac
|
Merge branch 'feat/c61_psram_timing_tuning_v5.5' into 'release/v5.5'
psram: psram 80M timing tuning on c61 (v5.5)
See merge request espressif/esp-idf!40914
|
2025-07-31 15:30:18 +08:00 |
|
Michael (XIAO Xufeng)
|
3fcd7b1ba5
|
Merge branch 'feat/lcd_cam_dvp_driver_s3_v5.5' into 'release/v5.5'
DVP support and example for ESP32S3 (v5.5)
See merge request espressif/esp-idf!40329
|
2025-07-31 11:48:18 +08:00 |
|
armando
|
4b36b0a1ff
|
feat(psram): psram 80M timing tuning on c61
|
2025-07-30 16:55:01 +08:00 |
|
armando
|
18ff6750cc
|
feat(flash): flash 80M timing tuning on c5
|
2025-07-29 14:10:28 +08:00 |
|
gaoxu
|
e2929b78ef
|
feat(lcd_cam): add lc_dma_int value atomic protect for lcd and cam
|
2025-07-26 21:15:02 +08:00 |
|
gaoxu
|
ac941daa4e
|
feat(cam): add esp32s3 dvp cam support
|
2025-07-26 21:14:53 +08:00 |
|
gaoxu
|
4b46a16922
|
feat(adc): support ADC calibration on ESP32C61
|
2025-07-26 20:59:51 +08:00 |
|
Jiang Jiang Jian
|
cc2147238b
|
Merge branch 'feature/p4_add_3bit_for_wafer_major_v5.5' into 'release/v5.5'
feat(efuse): Adds 3-bit field for wafer major version in ESP32-P4 (v5.5)
See merge request espressif/esp-idf!40513
|
2025-07-25 21:20:57 +08:00 |
|
Jiang Jiang Jian
|
9316e840a7
|
Merge branch 'c61_sdio_v5.5' into 'release/v5.5'
feat(sdio): support sdio on esp32c61 (v5.5)
See merge request espressif/esp-idf!40716
|
2025-07-25 20:27:30 +08:00 |
|
Jiang Jiang Jian
|
8840072320
|
Merge branch 'fix/spi_master_p4_change_default_clk_pll_v5.5' into 'release/v5.5'
fix(driver_spi): master driver change esp32p4 default src to pll (v5.5)
See merge request espressif/esp-idf!40113
|
2025-07-25 20:04:03 +08:00 |
|
gaoxu
|
62b9e1620d
|
feat(sdio): support sdio on esp32c61
|
2025-07-24 14:13:23 +08:00 |
|
wanckl
|
cc54f04f96
|
fix(driver_spi): master driver change esp32p4 default src to pll
|
2025-07-24 00:41:57 +08:00 |
|
wanckl
|
a8d4196a3b
|
fix(driver_twai): add rx buffer check and c5 errata doc
|
2025-07-24 00:36:26 +08:00 |
|
Konstantin Kondrashov
|
5d946e6ec0
|
feat(efuse): Adds 3-bit field for wafer major version in ESP32-P4
|
2025-07-24 00:35:28 +08:00 |
|
Jiang Jiang Jian
|
0291ab0dfb
|
Merge branch 'feature/support_chip912_pvt_auto_dbias_360m_backport_v5.5' into 'release/v5.5'
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4_backport_v5.5
See merge request espressif/esp-idf!40676
|
2025-07-22 17:36:09 +08:00 |
|
Jiang Jiang Jian
|
b8936385d3
|
Merge branch 'bugfix/clic_mapping_mask_v5.5' into 'release/v5.5'
fix(hal): make CLIC interrupt routing function to only write related bits (backport v5.5)
See merge request espressif/esp-idf!39936
|
2025-07-22 17:20:17 +08:00 |
|
Jiang Jiang Jian
|
05db51c485
|
Merge branch 'feat/enable_wakeup_tests_for_more_chips_v5.5' into 'release/v5.5'
feat(esp_hw_support): enable wakeup tests for more chips (v5.5)
See merge request espressif/esp-idf!40045
|
2025-07-22 14:43:49 +08:00 |
|
Jiang Jiang Jian
|
3c39b32195
|
Chip/support esp32c61 v5.5
|
2025-07-22 12:21:36 +08:00 |
|
yanzihan@espressif.com
|
3d3731965c
|
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4
|
2025-07-18 09:54:31 +08:00 |
|
Omar Chebib
|
1b698f0997
|
fix(hal): make CLIC interrupt routing function to only write related bits
|
2025-06-23 17:45:08 +08:00 |
|
wuzhenghui
|
40a3b0cb23
|
fix(hal): fix pmu_ll_ext1_clear_wakeup_status API
|
2025-06-23 09:51:29 +08:00 |
|
harshal.patil
|
5210e576d5
|
feat(mbedtls/sha): New API for setting SHA mode
|
2025-06-18 16:46:39 +05:30 |
|
harshal.patil
|
e7a76ff71e
|
feat(soc): Update ESP32-C5 ECO2 to support SHA512
|
2025-06-18 16:46:39 +05:30 |
|
morris
|
3fe9252c3f
|
Merge branch 'feat/usb-explicit-fifo-config_v5.5' into 'release/v5.5'
feat(usb/hal): Add HAL API to configure custom FIFO layout (backport v5.5)
See merge request espressif/esp-idf!39266
|
2025-06-17 10:29:39 +08:00 |
|