Rename the internal ULP child-build marker to __ULP_BUILDV2 so component CMake files make the build-system scope explicit.
Document that the marker is currently set only by the IDF_BUILD_V2 ULP child path.
regi2c (the analog i2c master) is not implemented on FPGA: the
REGI2C_RTC_BUSY poll in the regi2c helpers never completes, so the
2nd-stage bootloader hangs until the WDT resets the chip (observed on
the ESP32-S31 FPGA, bitstream v5.0.0-most-ip).
Stub out the regi2c_impl_* macros in hal/regi2c_impl.h when
HAL_CONFIG(ENV_FPGA) is set, so every regi2c call site is skipped on
FPGA for all current and future targets.
Keep the ESP32-H4 regi2c test app aligned with the renamed SARADC
definitions so the target still builds after the ADC support merge.
Made-with: Cursor
