6 Commits

Author	SHA1	Message	Date
cjin	8353ea3a09	change(ble): added option for msys buffer source	2023-11-08 18:03:48 +08:00
cjin	6f89300764	change: changed ble msys init for controller	2023-09-05 15:10:38 +08:00
Roshan Bangar	a41f5387c1	NimBLE : Sync porting files	2023-07-05 10:02:58 +05:30
zwl	46127774fa	Unify controller internal error code on ESP32-C2	2022-12-09 15:23:44 +08:00
zwl	1732a6d044	Fixed memory leak when RAM free size is insufficient or setting ext scan parameters failed on ESP32-C2	2022-11-29 16:29:26 +08:00
GengYuchao	61ee34f713	Add new porting file	2022-06-20 17:00:12 +08:00