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762 Commits
Author SHA1 Message Date
morris 036af88e67 Merge branch 'bugfix/lp_uart_rx_iomux_pin_not_work_v5.3' into 'release/v5.3' 
fix(uart): lp uart rx iomux pin was not working as expected (v5.3)

See merge request espressif/esp-idf!47610
 2026-04-21 16:19:15 +08:00
Chen Jichang 9878db6765 change(parlio_tx): use shift edge instead sample edge 
Made-with: Cursor
 2026-04-20 10:45:16 +08:00
Song Ruo Jing f17f4c70f0 fix(uart): lp uart rx iomux pin was not working as expected 
Introduced in 8818157e42
The workaround in the commit routes the signal to LP GPIO matrix first.
When uses LP IOMUX pin as UART RX, the signal did not bypass the matrix,
which caused the issue.

This commit adds rtc_gpio_iomux_input and rtc_gpio_iomux_output APIs
to align with existing GPIO driver APIs.
 2026-04-14 20:21:00 +08:00
zwx 2e746ec86f feat(ieee802154): separated the 802.15.4 HAL codes from the HAL component 2026-03-25 20:10:10 +08:00
zhuanghang d5cae72fcc feat(802.15.4): set default pti and ed/cca pti to 3 for 154 2026-02-12 09:38:41 +08:00
morris 077f001de1 Merge branch 'fix/fix_dma_fail_when_flash_enc_enabled_v5.3' into 'release/v5.3' 
fix(dma): fix dma alignment when flash_enc enabled (v5.3)

See merge request espressif/esp-idf!45082
 2026-02-06 10:33:32 +08:00
gaoxu bc9c799a2d ci(adc): enable P4 ADC test and correct ADC performance thresh 2026-02-03 16:52:04 +08:00
Chen Jichang e12b248751 fix(gdma): fix dma burst size when flash enc enabled 2026-02-02 09:56:59 +08:00
Xu Si Yu b72a300386 feat(802.15.4): add SW data request detection 2026-01-28 12:22:58 +08:00
hebinglin 757671692f fix(esp_hal_wdt): replace the erroneous RWDT timeout config in ROM with the code in ram 2026-01-20 20:58:42 +08:00
Chen Chen 96d681fc14 fix(ledc): fix potential null dereference issue & add test case 2026-01-07 15:02:56 +08:00
Chen Chen 94f9f086f9 fix(intr_alloc): Fix ISR allocate methods in several drivers 2026-01-07 10:17:09 +08:00
Song Ruo Jing 0ce63c0a2b fix(ppa): YUV444 cannot be a PPA SRM output color mode 2025-12-24 11:55:58 +08:00
C.S.M 8659c44975 feat(uhci): Add uhci (uart-dma) support on current chips 2025-08-28 18:23:23 +08:00
Song Ruo Jing 11c425f2dc fix(ledc): duty_start bit should wait for its self-clear before next set on esp32 2025-08-14 19:16:22 +08:00
Li Shuai 08c146b2ab change(hal): add hal interface to configure pau regdma wait timeout parameter 2025-08-06 19:42:35 +08:00
morris 15bc442a88 Merge branch 'feat/usb-explicit-fifo-config_v5.3' into 'release/v5.3' 
feat(usb/hal): Add HAL API to configure custom FIFO layout (backport v5.3)

See merge request espressif/esp-idf!39264
 2025-06-03 14:35:32 +08:00
Song Ruo Jing 8baffe22cb fix(uart): LP UART does not have the pre-divider for its clock source 
Closes https://github.com/espressif/esp-idf/issues/15427
 2025-05-22 11:51:19 +08:00
igor.masar d98a828c7e feat(usb/hal): Add support for explicit FIFO configuration 
Introduce a new HAL API `usb_dwc_hal_set_fifo_config()` that allows advanced users
to manually configure RX, Non-Periodic TX, and Periodic TX FIFO sizes. This offers
fine-grained control beyond the previous bias-based sizing approach.

The HAL function no longer returns `esp_err_t`, and internal validations are enforced
via `HAL_ASSERT()`. Responsibility for input validation has been moved to the HCD layer.

FIFO configuration must be applied before any USB pipes are created or activated.
This feature is intended for use during `usb_host_install()`.

If no custom FIFO configuration is provided (i.e., all values are zero),
the driver falls back to a bias-based default layout based on Kconfig settings
(`CONFIG_USB_HOST_HW_BUFFER_BIAS_*`). Bias resolution is done inside `hcd_port_init()`.

The `port_obj_t` structure has been extended with a `fifo_config` field, which stores
the configuration to allow re-application after a USB port reset.

Obsolete FIFO bias enums (`usb_hal_fifo_bias_t`, `hcd_port_fifo_bias_t`) and related
APIs (`hcd_port_set_fifo_bias()`) have been removed in favor of the new structure-based mechanism.

The HCD initialization and port reset flow has been updated to use the explicit
FIFO configuration.

USB Host maintainer documentation (`maintainers.md`) has been updated accordingly.
Test cases were updated to remove the usage of removed bias API and now rely on default
or custom FIFO configuration.
 2025-05-20 15:44:54 +02:00
C.S.M 87c6979b97 fix(i2c): Fix that fsm reset cause i2c scl frequency changed on esp32s2 2025-05-08 13:01:30 +08:00
laokaiyao 781ccfbd0c fix(touch): fixed tie option take no effect 2025-04-21 20:46:33 +08:00
morris 3f9d5cac2a Merge branch 'bugfix/clear_ledc_gamma_ram_v5.3' into 'release/v5.3' 
fix(ledc): left-off gamma ram registers should be cleared (v5.3)

See merge request espressif/esp-idf!37573
 2025-04-16 10:19:51 +08:00
morris 7c447b5525 Merge branch 'bugfix/gpio_dump_io_config_v5.3' into 'release/v5.3' 
fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32 (v5.3)

See merge request espressif/esp-idf!37909
 2025-04-16 10:17:44 +08:00
morris cff4d595e5 Merge branch 'fix/jpeg_decoder_collective_backport_v5.3' into 'release/v5.3' 
fix(jpeg_decoder): JPEG Decoder collective backport to v5.3

See merge request espressif/esp-idf!37508
 2025-04-15 10:24:04 +08:00
diplfranzhoepfinger 1d7d24b160 fix(twai): fixed twai assert fail when recover 
driver try start new frame in ISR however already bus off

Closes https://github.com/espressif/esp-idf/issues/9697
 2025-04-10 20:07:16 +08:00
Song Ruo Jing 47f1a2c81b fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32 
Closes https://github.com/espressif/esp-idf/issues/14931
 2025-03-20 17:09:28 +08:00
peter.marcisovsky 3e8d088748 fix(jpeg_decoder): Correctly handle invalid 0xffff JPEG marker 2025-03-07 10:30:10 +01:00
Song Ruo Jing d173affef0 fix(ledc): left-off gamma ram registers should be cleared 
Hardware reads in (range_number+1) fade parameter registers, which could
cause output waveform error.
 2025-03-07 17:30:05 +08:00
Jiang Jiang Jian 5f18a9711b Merge branch 'feature/esp32h2_eco5_ecc_v5.3' into 'release/v5.3' 
feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 (v5.3)

See merge request espressif/esp-idf!36585
 2025-02-28 10:50:18 +08:00
Aditya Patwardhan 08e250d081 fix(soc): Fixed ECDSA register compatibility 2025-02-26 17:04:27 +05:30
morris 03a2fca29d Merge branch 'feature/flash_software_resume_v5.3' into 'release/v5.3' 
feat(spi_flash): Add config for adding auto check status after suspend to improve performance (backport v5.3)

See merge request espressif/esp-idf!36526
 2025-02-20 11:01:11 +08:00
Mahavir Jain e97c51ea24 feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 2025-02-19 19:15:17 +05:30
Armando e1ea5ee810 fix(mmu): fixed esp_mmu_vaddr_to_paddr cannot figure out psram vaddr issue on esp32p4 2025-02-19 14:07:47 +08:00
Mahavir Jain e1a023e13d Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.3' into 'release/v5.3' 
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.3)

See merge request espressif/esp-idf!36464
 2025-01-24 14:40:00 +08:00
morris 8f20eac2df Merge branch 'feat/spi_std_timing_and_bit_trans_v5.3' into 'release/v5.3' 
feat(driver_spi): support adjust master rx to standard timing (v5.3)

See merge request espressif/esp-idf!36400
 2025-01-24 10:24:14 +08:00
harshal.patil ae4e693cfc feat(hal/spi_flash_encrypted): Enable pseudo rounds function during XTS-AES operations 2025-01-23 14:06:16 +05:30
harshal.patil 8d30077744 feat(hal/aes): Enable pseudo rounds function during AES operations 2025-01-23 14:06:16 +05:30
C.S.M d756e6d208 feat(spi_flash): Add config for adding auto check status after suspend to improve performance 2025-01-21 15:04:21 +08:00
C.S.M d772cb3055 feat(spi_flash): support software resume after suspend in unicore 2025-01-21 15:02:22 +08:00
Jiang Jiang Jian 4e0cb9a140 Merge branch 'fix/fix_p4_deepsleep_io_leakage_v5.3' into 'release/v5.3' 
fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage (v5.3)

See merge request espressif/esp-idf!36009
 2025-01-17 12:10:46 +08:00
wanckl e1cc1e2568 feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing 2025-01-17 10:48:52 +08:00
Tomas Rezucha 144f8a660e refactor(usb/phy): Start using values from usb_dwc_info in PHY driver 
Add tests for PHY sanity checks
 2025-01-16 16:39:59 +08:00
Tomas Rezucha 47fd8aac23 feat(hal/usb): Explicitly enable clock and reset USB WRAP on init 2025-01-16 16:39:59 +08:00
wanckl 283a192713 fix(twai): currect twai type macro initialize definition 2025-01-09 11:54:56 +08:00
Zhuang Hang b3830bed43 feat(802.15.4): add api for set/get ack timeout (v5.3) 2025-01-02 12:21:52 +08:00
wuzhenghui a18fe20e9b fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage 2024-12-26 16:05:14 +08:00
morris 4d5d5defd5 feat(lcd): increase the upper limit of pclk frequency for RGB LCD 2024-12-24 22:47:52 +08:00
morris 3946fbb142 Merge branch 'feat/dynamic_usb_hal_backport_v5.3' into 'release/v5.3' 
feat(hal/usb): Make USB-DWC HAL&LL configuration independent backport v5.3

See merge request espressif/esp-idf!34811
 2024-12-07 23:19:56 +08:00
wanckl 99f7733d8e fix(esp_adc): fixed adc continue monitor don't work issue 
Closes https://github.com/espressif/esp-idf/issues/14769
Closes https://github.com/espressif/esp-idf/issues/14814
 2024-11-25 15:48:11 +08:00
Tomas Rezucha 177679b74e feat(hal/usb): Make USB-DWC HAL&LL configuration independent 
Previously, we included symbols from soc/usb_dwc_cfg.h and configured
the HAL and LL according to it. Now we get the configuration in runtime
from USB-DWC registers.

Added missing definition for USB FS peripheral on ESP32-P4.
 2024-11-22 17:32:22 +08:00