Use the target RC_FAST approximation for LP core delay conversion.
This prevents ESP32-S31 from under-delaying when running from RC_FAST.
Co-authored-by: Cursor <cursoragent@cursor.com>
The LP SPI driver read and wrote the W0..W15 data buffer registers a
whole 32-bit word at a time, which overran the caller's buffer for
transfers whose length was not a multiple of four bytes and corrupted
the received data. Read and write the data buffer byte-granularly so
sub-word transfers no longer alias adjacent bytes.
The master transfer also programmed the shared bit-length register from
tx_length alone, truncating receive-longer-than-transmit transactions,
and always enabled MOSI even on read-only transfers, clocking out stale
buffer contents. Size each hardware transaction by max(tx_length,
rx_length) and gate MOSI/MISO on the corresponding buffer.
The slave path reused the master's single-shot flow, so it re-triggered
reg_update after preload (clocking out the previous transaction's data)
and offered no way for the caller to publish readiness before the master
started the clock. Split the slave transfer into an arm step that
preloads the buffer and starts the user phase, and a wait step that
blocks on TRANS_DONE and drains only the bytes the master actually
clocked in, tracked in software since reg_usr is not a reliable busy
indicator in slave mode.
Set the LP IO direction for the SPI pads, add
lp_core_lp_spi_bus_deinit() to release the LP GPIO pins, and reset the
LP SPI peripheral at bus initialization so a stale configuration from a
previous run cannot leak into the next.
lp_core_uart_set_pin() unconditionally configured the RTS and CTS GPIO
pins even when flow control was disabled. Only configure the RTS pin
when UART_HW_FLOWCTRL_RTS is set, and the CTS pin when
UART_HW_FLOWCTRL_CTS is set.
Use dual-path macros: C keeps fragment-style designated initializers;
C++ uses GNU statement expressions (ESP_LOG_CONFIG_INIT pattern).
Add compile-only C++ regression tests for LP UART/I2C and ULP RISC-V I2C.
Closes https://github.com/espressif/esp-idf/issues/18369
Co-authored-by: Cursor <cursoragent@cursor.com>
This allows rtc_gpio_deinit to always switch the pad back to GPIO,
regardless of lp io clock enabled or not, so that gpio_config can
always switch the IO back to GPIO use after wakeup from deep sleep.
On SOC_LP_GPIO_MATRIX_SUPPORTED targets, route LP SPI, I2C, and remapped
LP UART pins through lp_gpio_connect_* (rtcio_hal_matrix_* on release
branches applies IOMUX and matrix routing).
Remove redundant rtc_gpio_set_direction and rtc_gpio_iomux_func_sel
before matrix connect for LP SPI and remapped LP UART pins.
Non-matrix LP I2C: use rtc_gpio_iomux_output instead of
rtc_gpio_iomux_func_sel. Non-matrix LP UART: use rtc_gpio_iomux_output
and rtc_gpio_iomux_input for func sel and direction.
The existing spinlock mechanism possibly has an overlap of memory
operations during multi core execution, as visible in CI testing. When
running the example inter_cpu_critical_section, shared count increment
stops at 299999 instead of reaching 300000, but this only happens
randomly 1 out of 10 times. It is suspected that a memory operation
happens simultaneously from both core, even though spinlock protection
is in place.
To handle this problem, a memory barrier (fence instruction) is added
at critical places during spinlock acquire and release, to ensure that
all memory operations upto that point are completed and synchronised
before proceeding further.
This commit sets the calibration parameters for a a given LP ADC unit
and channel to improve the raw LP ADC reading when read from the LP
core. The calibration params are set from the HP core.
lp_core_i2c.h header file has sda and scl pins hardcoded to GPIO6 and
GPIO7 which works only for ESP32C6. ESP32C5 uses GPIO2 and GPIO3 for
I2C SDA and SCL. Hence, added LP_I2C_SCL_IO and LP_I2C_SDA_IO macros
under conditional compilation in library header file, so there is no
need to hardcode I2C GPIO pins and any other test apps or examples
that are including the LP I2C header file can also use Macro directly.
This commit updates the lp_core_uart_tx_flush() API to wait for the Tx line
to become idle, therefore confirming that all bytes are sent out.
Closes https://github.com/espressif/esp-idf/issues/15433
Jiang Jiang Jian
Marius VikhammerandCursor
Sudeep Mohanty
Samuel Obuch
hebinglin
Song Ruo Jing
Konstantin Kondrashov
Meet Patel
X-Ryl669
jath03
morris
laokaiyao
wuzhenghui
igor.udot
Armando
Liu Xiao Yu