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20,934 Commits 23 Branches 184 Tags
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Commit Graph

22 Commits

Author SHA1 Message Date
Aditya Patwardhan
5d61eea847 efuse_example_test: Fix the example test ( broken due to latest change 
in info message)

*Unify the log messages when UART ROM Download mode is kept enabled
 2021-11-23 15:21:32 +05:30
Aditya Patwardhan
be65338212 secure_boot: Fix warning when UART ROM DL mode is disabled 
*Additionally use updated calls to enable rom secure download mode
 2021-11-22 12:01:15 +05:30
Sachin Parekh
bf1dde7233 bootloader: Enable clock glitch detection 
Reset the device when clock glitch detected. Clock glitch detection is
only active in bootloader
 2021-09-02 12:25:12 +05:30
Armando (Dou Yiwen)
3e172289b0 Merge branch 'feature/support_octal_flash_120m_str_mode_on_esp32s3' into 'master' 
mspi: support octal flash 120MHz STR mode on esp32s3

Closes IDF-3146

See merge request espressif/esp-idf!14668
 2021-08-20 08:40:02 +00:00
Sachin Parekh
2d82560ed5 bootloader: Enable Secure boot V2 for ESP32-S3 2021-08-19 14:08:12 +05:30
Armando
d325f4d557 mspi: support octal flash 120M STR mode on esp32s3 2021-08-19 10:44:30 +08:00
Michael (XIAO Xufeng)
dd40123129 bootloader: add xmc spi_flash startup flow to improve reliability 2021-08-12 17:22:42 +08:00
Cao Sen Miao
c29b3e2e36 spi_flash: move the unlock patch to bootloader and add support for GD 2021-07-29 10:46:33 +08:00
KonstantinKondrashov
92448e7bd7 secure_boot: Whole 3 bits are set for SOFT_DIS_JTAG eFuse 2021-07-21 17:19:01 +05:00
Marius Vikhammer
b8a322195e flash encryption: add flash encryption support for ESP32-S3 2021-07-14 18:46:17 +08:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Marius Vikhammer
71c1da8952 timer group: add timer group and WDT support for ESP32S3 
Regenerate timer group header files and update LL, check examples
and update docs.
 2021-07-06 16:21:43 +08:00
Konstantin Kondrashov
f339b3fc96 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 
These functions were used only for esp32 in secure_boot and flash encryption.
Use idf efuse APIs instead of efuse regs.
 2021-06-17 07:21:36 +08:00
Jan Brudný
a2686dc4eb bootloader: update copyright notice 2021-05-10 04:58:34 +02:00
Marius Vikhammer
2aead8ba57 Support ESP32S3 Beta 3 target 
Update ROM API. Port changes from bringup branch.
 2021-03-18 10:24:22 +08:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot) 
- ESP32 ECO3, ESP32-S2/C3/S3
 2021-03-15 12:30:20 +00:00
KonstantinKondrashov
88c5fe49b8 soc: Adds a soc_caps define for all chips to define the number of boot key digests 2021-01-19 20:51:13 +08:00
Konstantin Kondrashov
fbba2cb356 bootloader/esp32s2: Add using of efuse APIs for keys, purposes, wr/rd-protection bits for flash encryption, secure boot 2021-01-08 11:29:46 +08:00
Supreet Deshpande
e517b4953f Secure Boot v2: Fix the double padding of the image length during flash encryption 
Fixes https://github.com/espressif/esp-idf/issues/6236
 2020-12-21 11:32:37 +05:30
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
KonstantinKondrashov
66b9b589cb efuse: Adds support for esp32-s2 chip 2020-10-14 16:26:51 +08:00
morris
6225932201 bootloader_support: add esp32-s3 initial support 2020-09-22 15:15:03 +08:00