This commit reorganizes SPI flash header files to better reflect their
visibility and intended usage:
1. Rename `esp_flash_port/` to `esp_flash_chips/`:
- Better reflects that these headers are for chip driver implementations
- All chip driver headers moved to `esp_flash_chips/` directory
- Added README.md explaining semi-public nature of these headers
2. Move internal headers to `esp_private/`:
- `esp_flash_internal.h` -> `esp_private/esp_flash_internal.h`
- `memspi_host_driver.h` -> `esp_private/memspi_host_driver.h`
3. Move chip driver related headers to `esp_flash_chips/`:
- `esp_private/esp_flash_types.h` -> `esp_flash_chips/esp_flash_types.h`
- `spi_flash/spi_flash_defs.h` -> `esp_flash_chips/spi_flash_defs.h`
- `spi_flash_override.h` -> `esp_flash_chips/spi_flash_override.h`
- All `spi_flash_chip_*.h` headers moved to `esp_flash_chips/`
4. Code improvements:
- Remove unused includes (e.g., `spi_flash_override.h` from `cache_utils.c`)
- Use public API `esp_flash_get_size()` instead of direct member access
- Add `esp_flash_is_quad_mode` to linker.lf for IRAM placement
5. Documentation updates:
- Add README.md in `esp_flash_chips/` explaining semi-public headers
- Update programming guide with warnings about internal headers
- Update both English and Chinese documentation
6. Update all references across the codebase:
- Update includes in `spi_flash` component
- Update `bootloader_support`, `app_update`, `esp_tee`, `espcoredump`
- Update example projects
Breaking changes:
- Headers moved to new locations require include path updates
- `custom_flash_driver` example temporarily disabled until external
components are updated
This commit also added config option to set default buffer size for OTA.
This testcase mainly checks if OTA resumption fails if data written is
not 16 byte aligned when Flash Encryption is enabled.
- Destination selection is unified for SystemView and app_trace
- Destination param is removed from app_trace APIs
- Destinaiton and related configuration now can be override from users
with a callback from system_init_fn
Added a pulse counter example code for ulp riscv chips. The example
works by HP core generating high frequency pulses on a GPIO, which
are counted by ULP core to find out the highest possible frequency
of pulses that can be achieved without missing any edges.
- When NVS encryption is enabled on SoCs with the HMAC peripheral that have flash encryption
enabled, the HMAC-based NVS encryption scheme is now selected as default instead of the
flash encryption-based scheme.
- If your application previously used the flash encryption-based scheme, you need to manually
configure the NVS encryption scheme to flash encryption from HMAC through ``menuconfig``
or your project's ``sdkconfig`` (i.e., setting ``CONFIG_NVS_SEC_KEY_PROTECT_USING_FLASH_ENC=y``).
Xiao Xufeng
Jiang Jiang Jian
Li Shuai
Ashish Sharma
morris
Erhan Kurubas
wanckl
Shu Chen
Song Ruo Jing
nilesh.kale
Tan Yan Quan
Alexey Gerenkov
Marius Vikhammer
Konstantin Kondrashov
Euripedes Rocha
armando
glmfe
Omar Chebib
wuzhenghui
Kevin (Lao Kaiyao)
Peter Dragun
Chen Chen
Meet Patel
Ondrej Kosta
Laukik Hase