Commit Graph

114 Commits

Author SHA1 Message Date
wuzhenghui
82712313ea change(heap): reserve DMA pool with low priority MALLOC_CAP_DEFAULT caps 2026-07-09 17:37:14 +08:00
Xiao Xufeng
c5ab07fe81 fix(mspi): fixed possible boot failure in some builds when psram is enabled
A typical scenario is: when XIP on PSRAM enabled, compiler optimization level is Os. Under certain binary layout, boot hangs and backtrace points to `esp_sleep_config_gpio_isolate`.

The root cause is that, during PSRAM initialization, it calls esp_gpio_reserve, which happens to place before the reported function. However, after call, there is no barrier before the clock adjustment in `mspi_timing_enter_low_speed_mode`. The clock gets changed when the cache is still fetching data, resulting in the corrupted data in the end of the cache line.

This commits add spi_flash_disable_cache as a barrier to make sure the cache transactions is finished before the clock switch.
2026-06-01 17:46:12 +08:00
Evgeny Torbin
59f62ad15f test: format all test scripts 2026-04-17 16:01:00 +02:00
armando
df9659dda2 feat(psram): support fallback to use default driver pattern when id isn't match 2025-06-20 09:38:43 +08:00
armando
29a7e5f35f fix(psram): fixed psram ptr check under xip_psram condition
Closes https://github.com/espressif/esp-idf/pull/15999
Closes https://github.com/espressif/esp-idf/issues/15997
2025-06-09 10:34:44 +08:00
John Boiles
9faf8c3a52 fix(memory-utils): Add _instruction_reserved_start/end to esp_psram_check_ptr_addr
Adds missing range check that can be used when SPIRAM_XIP_FROM_PSRAM is enabled.
2025-06-09 10:34:40 +08:00
harshal.patil
5e15adfae9 fix(esp_psram): Add XIP PSRAM alignment gaps in heap only if PSRAM protection is enabled 2025-05-21 15:36:41 +05:30
harshal.patil
29f7654c2b feat(cpu_region_protect): Enable basic memory protection for SPIRAM 2025-05-21 15:36:41 +05:30
harshal.patil
8d42a711c4 feat(esp_psram): Add the gap created due to alignment of XIP segments in heap 2025-05-21 15:36:41 +05:30
harshal.patil
2cb93cd926 feat(esp_psram): Add some helper APIs to get usable PSRAM memory size 2025-05-21 15:36:41 +05:30
Armando
21bd94f116 fix(linker): fixed extern linker symbol type from int to char 2025-05-21 15:36:40 +05:30
morris
950c9df5e5 Merge branch 'fix/fix_mmu_map_concurrent_issue_v5.3' into 'release/v5.3'
mmu: fix mmu map concurrent issue (v5.3)

See merge request espressif/esp-idf!38410
2025-04-17 21:13:28 +08:00
morris
4bab63dc26 Merge branch 'fix/pr_15513_psram_bss_noinit_calc_issue_v5.3' into 'release/v5.3'
psram: correct .bss and .noinit vaddr calculation (v5.3)

See merge request espressif/esp-idf!37663
2025-04-15 14:45:42 +08:00
armando
231694ac25 test(system): increased 200B memory leak thresh due to mmu mmap mutex
200B to extend the thresh, real increase to the memory usage will be smaller
2025-04-15 14:24:23 +08:00
morris
9e58fe0004 Merge branch 'feat/unilc_psram_s3_v5.3' into 'release/v5.3'
psram: supported UnilC octal psram on s3 (v5.3)

See merge request espressif/esp-idf!37855
2025-04-15 10:16:44 +08:00
armando
d7eb89c7f7 feat(psram): supported new octal psram on s3 2025-03-19 10:23:07 +08:00
armando
9af8b5468c refactor(psram): rename .bss .noinit segments to sections
Closes https://github.com/espressif/esp-idf/pull/15513
2025-03-11 11:43:56 +08:00
Erki Aring
ed2b78e4ce fix(psram): correct heap vaddr calculation
- fixes https://github.com/espressif/esp-idf/issues/15496

Signed-off-by: armando <douyiwen@espressif.com>
2025-03-11 11:43:53 +08:00
harshal.patil
223b25e1f3 fix(esp_psram): Fix incorrect calculation of used XIP PSRAM pages
The functions mmu_config_psram_text_segment() and mmu_config_psram_rodata_segment()
used to return the value of next start page in *out_page instead of the number
of pages used as mentioned in the documentation
2025-03-05 10:37:42 +05:30
Armando
f8e84969f9 test(psram): added mem leak thresh for xip test, previous is 600 is close to the actual leak 2025-02-19 14:07:47 +08:00
Song Ruo Jing
6975924104 feat(heap): add a MALLOC_CAP_SIMD flag
MALLOC_CAP_SIMD can be used to allocate memory to be used for SIMD instructions
2025-02-08 16:29:36 +08:00
Jiang Jiang Jian
ca961274f5 Merge branch 'feat/backport_some_feature_and_bugfix_v53' into 'release/v5.3'
Feat/backport some feature and bugfix v53

See merge request espressif/esp-idf!35925
2025-01-02 20:31:03 +08:00
Armando
03f12395de fix(psram): fixed mode reg read bad timing on octal and hex psrams 2024-12-25 11:02:38 +08:00
wangtao@espressif.com
da39fcebc4 feat(wifi): fix SPIRAM_IGNORE_NOTFOUND releated config 2024-12-24 15:15:31 +08:00
Armando
7b770e5230 fix(psram): fixed esp32p pico-v3 psram init not ignored issue 2024-12-04 10:49:01 +08:00
Omar Chebib
d902ed146c fix(esp_psram): fix a bug in PSRAM heap registration
This commit fixes a bug in the PSRAM heap initialization that didn't take into
account the reserved himem area when registering the PSRAM virtual space as a heap.
2024-11-14 19:11:20 +08:00
Chen Jichang
9e3fca8d71 feat(psram): add psram noinit segment support on S2/S3/P4/C5
Closes https://github.com/espressif/esp-idf/issues/14253
2024-09-03 15:39:54 +08:00
Armando
475825c436 fix(psram): fixed ap3204 id check 2024-08-27 15:50:08 +08:00
morris
a156e2871e Merge branch 'feat/support_psram_aps3204l_v5.3' into 'release/v5.3'
psram: support APS3204L (v5.3)

See merge request espressif/esp-idf!32390
2024-07-29 16:00:25 +08:00
Armando
10d68e943a feat(psram): support APS3204L 2024-07-29 11:41:00 +08:00
Armando
21b861e9df change(psram): improved xip psram docs on p4 2024-07-29 10:36:44 +08:00
morris
e296941d36 Merge branch 'fix/fix_p4_psram_20m_wrong_clk_div_v5.3' into 'release/v5.3'
fix(psram): fixed p4 psram 20M wrong clk div (v5.3)

See merge request espressif/esp-idf!32255
2024-07-25 16:42:29 +08:00
Armando
6fa12ecdf8 fix(psram): fixed p4 psram 20M wrong clk div 2024-07-22 09:27:11 +08:00
Armando
0b5db82e5e feat(psram): support bss on psram on p4 2024-07-15 15:56:23 +08:00
Armando
d83e7ea505 fix(esp_system): fixed not necessary public require to bootloader_support 2024-06-13 11:26:35 +08:00
Armando
48e06fafea feat(xip_psram): support xip psram feature on esp32p4 2024-05-29 10:02:44 +08:00
morris
cf59c00564 change(mpll): clean up mpll clock acquire with ldo driver 2024-03-25 22:03:49 +08:00
Guillaume Souchere
d0b97fbd6b Merge branch 'refactor/decouple-psram-init-from-essp-system' into 'master'
refactor(esp_psram): Decouple psram init from esp_system

Closes IDF-8769

See merge request espressif/esp-idf!29042
2024-03-12 21:01:59 +08:00
Konstantin Kondrashov
3f89072af1 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
Guillaume Souchere
8a8ed00852 refactor(esp_psram): Decouple psram init from esp_system 2024-03-11 11:50:43 +01:00
morris
c952cfb673 feat(gpio): reserve gpio output atomically 2024-03-09 10:33:58 +08:00
KonstantinKondrashov
b471d9d22c change(all): Clearing unused efuse rom headers 2024-01-22 18:02:55 +02:00
Ondrej Kosta
ce388a4111 feat(esp_eth): Added support of internal EMAC for ESP32P4
Refactored internal EMAC DMA access.

Added MPLL acquire to manage access to the MPLL by multiple periphs.
2024-01-16 14:29:25 +01:00
Armando
96f1853cd0 ci(psram): added esp_psram test dependency 2024-01-12 10:33:38 +08:00
Armando
2a8459b059 ci(psram): enable psram test on p4 2024-01-12 10:33:24 +08:00
Armando
80e18811db feat(psram): support 200mhz psram, experimental feature for now 2024-01-10 11:52:28 +08:00
Song Ruo Jing
7f2b85b82b feat(clk): add basic clock support for esp32p4
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
2023-12-29 00:37:26 +08:00
Armando
71202c701f change(ldo): do vddpst ldo init in early stage 2023-12-26 11:43:33 +08:00
Armando
8e9d90f603 feature(esp_psram): p4 real chip 20M 2023-12-18 15:18:07 +08:00
muhaidong
f37448cddb fix(wifi): fix psram enabled but initialized fail issue
Closes https://github.com/espressif/esp-idf/issues/11971
2023-12-05 11:19:59 +08:00