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24 Commits

Author SHA1 Message Date
Ondrej Kosta
edbf8856ae feat(esp_eth): add ESP32-S31 EMAC support 
Add internal EMAC support for ESP32-S31, including:
- HAL/LL layer: emac_ll, emac_hal, emac_clk, emac_periph for S31
- SOC layer: register structs, soc_caps, peripherals linker script,
  interrupt definitions
- MAC driver: clock source configuration via Kconfig, GPIO/DMA
  adaptations, PHY register defs for clause-45 MDIO
- Ethernet examples updated for S31 (basic, build-test-rules, PTP
  readme)
- Refactored existing ESP32/ESP32-P4 EMAC code for shared patterns
  (emac_clk extraction, struct alignment, periph descriptor cleanup)
 2026-05-21 15:59:42 +08:00
Ondrej Kosta
ed2e6735ff feat(esp_libc): refactored POSIX timers get/set functions 
- Added sys/timex.h and clock_adjtime API
 2026-03-31 22:32:33 +08:00
Ondrej Kosta
d622d4d9ac feat(esp_eth): removed SPI Ethernet and PHY drivers from IDF 2025-09-28 16:19:42 +02:00
Ondrej Kosta
5aa97623c1 feat(esp_eth): removed RMII CLK Kconfig option 2025-09-17 11:46:06 +02:00
Ondrej Kosta
50704ffa70 docs(esp_eth): added warning to not use ESP32 as ETH CLK source with WiFi 2024-08-27 20:01:23 +08:00
Ondrej Kosta
d15a9c2c48 feat(esp_eth): a new folder structure of the driver and other improvements 
Fixed memory leak in emac_esp_new_dma function.

Polished ESP EMAC cache management.

Added emac_periph definitions based on SoC features and improved(generalized) ESP EMAC GPIO
initialization.

Added ESP EMAC GPIO reservation.

Added check for frame error condition indicated by EMAC DMA and created a target test.
 2024-05-14 08:23:31 +02:00
Ondrej Kosta
ce388a4111 feat(esp_eth): Added support of internal EMAC for ESP32P4 
Refactored internal EMAC DMA access.

Added MPLL acquire to manage access to the MPLL by multiple periphs.
 2024-01-16 14:29:25 +01:00
Ondrej Kosta
0ff10c3e06 feat(esp_eth): added IRAM optimization option for internal EMAC 2023-09-05 07:42:30 +02:00
Ondrej Kosta
4051b80b4d esp_netif: remove dependency of L2 TAP Interface from netif_lwip 
esp_eth: extended infrastructure to optionally provide more advanced access to MAC/PHY layers
 2022-04-08 16:40:29 +02:00
Ondrej Kosta
a6db3a5e77 esp_eth: Change clock mode setting 
RMII clock mode is made to be run-time configurable.

Closes https://github.com/espressif/esp-idf/issues/6564
Closes https://github.com/espressif/esp-idf/issues/7107
 2021-07-08 14:27:31 +02:00
Vladimir Chistyakov
c4f131e6ee esp_eth: Add a KSZ8851SNL SPI Ethernet driver 
Implement the PHY and MAC layers in the driver similar to
the W5500 driver.

Update Kconfig, CMakeLists.txt, and component.mk to incorporate
the changes.

Resolves: #6542

Merges https://github.com/espressif/esp-idf/pull/6636
Closes https://github.com/espressif/esp-idf/issues/6542
 2021-04-22 13:55:51 +00:00
morris
006a87557b esp_eth: added option to disable soft flow control when rx buffer is few 2021-02-01 14:14:54 +08:00
morris
1e905acacf eth: support W5500 MAC RAW mode 
W5500 features an Ethernet MAC+PHY, plus a HW SOCKET implementation.
But in IDF, we only use software TCP/IP stack, which means we have
to bypass the HW TCP/IP stack in W5500.
So we enables the MAC RAW mode in W5500.
 2020-11-16 13:30:49 +08:00
morris
9e59be1aab ethernet: add enc28j60 example 2020-02-10 12:56:14 +08:00
Henry Gilbert
eda07acc81 Add ENC28J60 Ethernet Driver 
Merges https://github.com/espressif/esp-idf/pull/4435
 2020-02-10 12:56:14 +08:00
suda-morris
05d71319de ethernet: add gpio number into config structure 2019-11-20 10:36:45 +08:00
Angus Gratton
ae21d669b9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-17 18:22:08 +11:00
Ivan Grokhotkov
31dac92e5f ethernet: support OpenCores ethernet MAC 
OpenCores Ethernet MAC has a relatively simple interface, and is
already supported in QEMU. This makes it a good candidate for enabling
network support when running IDF apps in QEMU, compared to the
relatively more complex task of writing a QEMU model of ESP32 EMAC.

This driver is written with QEMU in mind: it does not implement or
handle things that aren't implemented or handled in the QEMU model:
error flags, error interrupts. The transmit part of the driver also
assumes that the TX operation is done immediately when the TX
descriptor is written (which is the case with QEMU), hence waiting for
the TX operation to complete is not necessary.

For simplicity, the driver assumes that the peripheral register
occupy the same memory range as the ESP32 EMAC registers, and the
same interrupt source number is used.
 2019-10-13 17:05:26 +02:00
Angus Gratton
438d513a95 Merge branch 'master' into feature/esp32s2beta_merge 2019-09-16 16:18:48 +10:00
suda-morris
14ffd355e6 ethernet: bugfix and optimize 
1. check frame length before pass to stack
2. replace semaphore with task notify
 2019-09-03 11:01:16 +08:00
Angus Gratton
2fcbc6aaa5 esp_eth: KConfig formatting fix 2019-08-14 16:50:30 +10:00
Angus Gratton
e32d27e7e8 esp_eth: Add CONFIG_ETH_ENABLED flag to enable/disable ethernet at build time 
Always enabled by default, as SPI/Ethernet support is enabled by default.
 2019-08-13 17:14:16 +10:00
suda-morris
cb42c29252 ethernet: support dm9051 
1. move resource allocation from xxx_init to xxx_new
2. fix enabling tx checksum insertion by mistake
3. iperf example: enlarge max arguments
4. add examples for spi-ethernet

Closes https://github.com/espressif/esp-idf/issues/3715
Closes https://github.com/espressif/esp-idf/issues/3711
 2019-07-04 19:38:13 +08:00
suda-morris
90c4827bd2 add esp_eth component 2019-06-26 10:19:23 +08:00