armando
c96f69faef
change(mem): deprecated tcm and added scp memory utils
2026-03-11 11:18:15 +08:00
Song Ruo Jing
69def0c3ea
feat(psram): allow PSRAM to enter halfsleep mode during light sleep
2026-02-28 22:33:34 +08:00
morris
0469db2f83
refactor(rcc): unify the usage of clock control macros for peripherals
...
- Removed conditional definitions for various RCC_ATOMIC macros across
multiple files, replacing them with a unified PERIPH_RCC_ATOMIC() macro.
- Updated instances where specific RCC_ATOMIC macros were used to ensure
consistent usage of PERIPH_RCC_ATOMIC().
- Deleted unused uart_share_hw_ctrl.h file as its functionality is now
integrated into the new structure.
2026-01-23 18:28:13 +08:00
Song Ruo Jing
215c9993bf
fix(clk): update H4 to use 64MHz clock for mspi
...
And add pll clock ref count
2026-01-04 14:07:01 +08:00
Armando
972a6195f2
feat(psram): support 250MHz in experimental
2025-11-12 16:14:02 +08:00
armando
ad4fe4c394
fix(psram): fixed psram cross page issue
2025-08-21 09:57:07 +08:00
armando
9be8dccef5
feat(psram): psram support on h4
2025-07-28 10:16:48 +08:00
armando
73113c0ce8
change(psram): change logw to logd
2025-06-25 06:45:33 +00:00
armando
954e88c92d
feat(psram): support fallback to use default driver pattern when id isn't match
2025-06-19 09:31:48 +08:00
armando
412b79ed1c
change(psram): limited 2t check only for ap
2025-05-26 17:06:03 +08:00
armando
00e256d343
fix(psram): fixecd wrong ap density check
2025-04-28 16:10:18 +08:00
armando
89d566bb9c
fix(psram): fixed psram init state not in low speed mode issue on c5 c61
2025-04-27 15:06:40 +08:00
armando
cf524b41a2
fix(psram): fix wrong mpll freq
2025-03-24 15:02:37 +08:00
Armando (Dou Yiwen)
ee5042095b
Merge branch 'refactor/psram_structure_refactor' into 'master'
...
refactor(psram): cleanup psram component code structure
See merge request espressif/esp-idf!37870
2025-03-21 00:52:03 +08:00
armando
ac8cfadab0
refactor(psram): cleanup psram component code structure
2025-03-20 15:17:01 +08:00
armando
56d5c00245
feat(psram): added 80MHz psram speed option
2025-03-19 11:57:10 +08:00
Armando
8a654ffce1
feat(psram): ecc feature on c5 c61
2025-01-17 16:39:59 +08:00
Armando
6505bcd297
refactor(psram): rename quad psram related naming
2025-01-17 11:31:11 +08:00
Armando
14b5db0e87
refactor(mspi): rename to mspi_ll.h
2025-01-07 16:16:06 +08:00
Armando
54a9386b2e
fix(psram): fixed mode reg read bad timing on octal and hex psrams
2024-12-24 16:04:47 +08:00
Omar Chebib
fe93c990e6
feat(esp_psram): add support for QEMU 16MB and 32MB QPI PSRAM
2024-11-14 10:24:43 +08:00
wanckl
19c6e77a31
fix(mspi): collect mspi iomux pin macro from iomux_reg.h to spi_pins.h
2024-09-03 13:55:00 +08:00
Armando
5e50b11232
fix(psram): fixed ap3204 id check
2024-08-27 09:51:27 +08:00
C.S.M
c431e9b830
feat(spiram): refactor for spiram device driver for s3/c5
2024-08-09 11:43:04 +08:00
Armando
1b8c8d5fd4
fix(psram): fixed p4 psram 20M wrong clk div
2024-07-18 17:34:47 +08:00
morris
cf59c00564
change(mpll): clean up mpll clock acquire with ldo driver
2024-03-25 22:03:49 +08:00
Ondrej Kosta
ce388a4111
feat(esp_eth): Added support of internal EMAC for ESP32P4
...
Refactored internal EMAC DMA access.
Added MPLL acquire to manage access to the MPLL by multiple periphs.
2024-01-16 14:29:25 +01:00
Armando
80e18811db
feat(psram): support 200mhz psram, experimental feature for now
2024-01-10 11:52:28 +08:00
Song Ruo Jing
7f2b85b82b
feat(clk): add basic clock support for esp32p4
...
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
2023-12-29 00:37:26 +08:00
Armando
71202c701f
change(ldo): do vddpst ldo init in early stage
2023-12-26 11:43:33 +08:00
Armando
8e9d90f603
feature(esp_psram): p4 real chip 20M
2023-12-18 15:18:07 +08:00
Armando
0beb637563
refactor(esp_psram): reformat code with astyle_py 2
2023-10-09 15:29:31 +08:00
Armando
b75f8561e5
change(psram): atomic set clock and reset
2023-08-31 17:10:34 +08:00
Armando
712c0c0075
feat(psram): esp32p4 psram device driver support
2023-08-28 14:14:58 +08:00
