Marius Vikhammer
10637dbf5e
feat(ulp): add support for ulp on esp32s31
2026-04-20 14:45:23 +08:00
Konstantin Kondrashov
74561963e1
feat(ulp): Improved ULP delay API accuracy and removed floating point operations
...
Closes https://github.com/espressif/esp-idf/issues/17494
Closes https://github.com/espressif/esp-idf/issues/16891
2026-03-05 10:39:34 +02:00
Marek Fiala
9d35d63651
feat(cmake): Update minimum cmake version to 3.22 (whole repository)
2025-08-19 14:44:32 +02:00
wuzhenghui
879713d589
change(esp_hw_support): deprecate esp_sleep_get_wakeup_cause with esp_sleep_get_wakeup_causes
2025-06-27 16:18:10 +08:00
igor.udot
daf2d31008
test: format all test scripts
2025-03-05 12:08:48 +08:00
Frantisek Hrbata
1c92945f59
change(examples): switch examples to use a minimal build
...
Currently, several example dependencies rely on the fact that all
registered components are added to the build, along with components
specified in common requirements. This results in longer build times
because even unused components must be built. Switch all examples to use
idf_minimal_build to compile only the components actually required by
the example.
Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com >
2024-11-20 20:14:40 +01:00
Sudeep Mohanty
bc74cf808d
feat(ulp-riscv): Added Kconfig option to enable ULP RISC-V interrupts
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This commit adds a Kconfig option, CONFIG_ULP_RISCV_INTERRUPT_ENABLE, to
enable interrupts on the ULP RISC-V core on the esp32s2 and esp32s3.
2024-02-21 11:45:06 +01:00
Sudeep Mohanty
4230acb971
feat(ulp-riscv): Added new example to demonstrate ULP RISC-V interrupts
...
This commit adds a new example which demonstrates how the ULP RISC-V
co-processor handles interrupts.
2024-01-18 15:59:49 +01:00
