Commit Graph

21 Commits

Author SHA1 Message Date
Sudeep Mohanty
06963baf0b test(ulp): add custom linker host tests
Add build-only host tests for LP-core custom linker layouts supplied through the
LINKER option. Cover the positive paths (a full-replacement layout, a
multi-region layout with a fixed-address section, a run-from-HP-mem layout, and
memory protection) and the link-time and configure-time checks (reset-vector
placement, sizing, shared-memory overrun, the MEMPROT RX/RW boundary, a missing
reset vector, and a missing LINKER script).
2026-07-31 14:50:09 +02:00
Renz Bagaporo
a91a316449 ci(ulp): re-enable legacy ULP buildv2 jobs 2026-07-29 13:08:22 +09:00
Renz Bagaporo
5b67ff37cd ci(ulp): temporarily disable legacy ULP apps for buildv2
Keep legacy ULP apps on the CMake v1 build path while buildv2 coverage
is limited to full_subproject ULP apps.

Also add the missing esp_driver_gpio dependency to the esp_pm test app
so buildv2 dependency checks see driver/rtc_io.h explicitly.
2026-07-15 10:17:52 +09:00
Renz Bagaporo
b4215c6d4d test(ulp): add gpio wakeup test 2026-07-02 16:43:46 +09:00
Marius Vikhammer
261bd160aa feat(ulp): support placing ULP app in HP-RAM 2026-04-29 09:47:33 +08:00
Marius Vikhammer
10637dbf5e feat(ulp): add support for ulp on esp32s31 2026-04-20 14:45:23 +08:00
Marius Vikhammer
5f914189c2 ci(core): removed common_components from core test-apps dependencies 2026-01-26 11:47:23 +08:00
igor.udot
4c26ab876b ci: update build-test-rules to use common_components 2026-01-23 10:14:09 +08:00
Marius Vikhammer
cc7ac472e6 ci(ulp): change depends_components for ULP tests and examples 2026-01-06 09:41:35 +08:00
Marius Vikhammer
cd0e6ec2ca fix(lp-core): fixed rtc mem conflict on p4 eco5 between app and ULP 2025-11-20 17:03:23 +08:00
armando
b25ba4a0c1 ci(p4): disable p4 rev3 invalid tests temporarily 2025-11-17 12:11:39 +08:00
Marius Vikhammer
914fc9f899 test(lp_core): re-enabled C5 lp-core test 2025-07-11 09:45:50 +08:00
Marius Vikhammer
00eb97725b feat(system): support choosing xtal as rtc-fast clock src on P4 and C5
With xtal as rtc-fast clock source the LP-Core can run at twice the default
clock frequency. 40 MHz as opposed to 20 MHz.
2024-09-19 17:30:44 +08:00
Marius Vikhammer
9b387caf19 fix(etm): add ulp etm ll functions 2024-07-16 10:04:18 +08:00
Marius Vikhammer
41d39a419f fix(pmp): fixed alignment of PMP addr for RTC mem on C5
Also refactored it for C6/H2/C61 to keep the approach consistent between targets
2024-07-04 16:24:46 +08:00
laokaiyao
cb22b8aaf7 ci(esp32c5): enable c5 target test 2024-07-02 16:45:49 +08:00
Marius Vikhammer
dff1e5df88 feat(lp_core): add support for lp timer and lp gpio on P4 2024-02-06 09:41:20 +08:00
Armando
3c5a4f9e8a ci(p4): added todo jira for disabled tests on p4 2024-01-04 09:36:38 +08:00
Armando
1ab742b3c3 ci(p4): enable esp32p4 target test 2024-01-04 09:34:55 +08:00
Sudeep Mohanty
f6ecaa12e9 ci(system): Restrict ULP test apps being built and run on CI
This commit updates the dependency list of the ULP test apps. These test
apps will now only build and run when the ULP component is updated.
2023-10-23 10:54:36 +02:00
Chen Yudong
2e11919f70 fix(ci): change build-test-rules files folder 2023-09-20 19:17:06 +08:00