Commit Graph
96 Commits
Author SHA1 Message Date
harshal.patil db7147f15a refactor(esp_system): deduplicate ROM fast wake RTC digest reservation
The digest length and the condition that reserves it at the end of RTC RAM were
duplicated in seven places. Hold the reservation in a hidden Kconfig value that
is zero when the feature does not apply, so every consumer subtracts it
unconditionally, and derive ESP_SECURE_BOOT_DIGEST_LEN from it.
2026-07-31 10:52:52 +08:00
wuzhenghui 708f34bd16 fix(esp_system): support rom secure boot fast wake feature for esp32s31 2026-07-28 21:46:24 +08:00
wuzhenghui b388afd2f3 fix(esp_hw_support): update memory pointer checks for SPM support 2026-07-10 14:19:47 +08:00
wuzhenghui 38421b8db7 change(heap): reserve DMA pool with low priority MALLOC_CAP_DEFAULT caps 2026-07-09 17:30:46 +08:00
Marius Vikhammer 261bd160aa feat(ulp): support placing ULP app in HP-RAM 2026-04-29 09:47:33 +08:00
Guillaume Souchere a56354e9ab feat(heap): move TLSF ROM patches and related files from esp_rom to heap
The TLSF ROM patch code (rom_patch_tlsf.c, rom_patch_multi_heap.c),
their headers, and the per-target *.rom.heap.ld linker scripts are
semantically owned by the heap component, not esp_rom. Move them
accordingly:

- components/esp_rom/patches/esp_rom_tlsf.c
  → components/heap/rom_patches/rom_patch_tlsf.c
- components/esp_rom/patches/esp_rom_multi_heap.c
  → components/heap/rom_patches/rom_patch_multi_heap.c
- components/esp_rom/include/esp_rom_tlsf.h
  → components/heap/rom_patches/include/rom_patch_tlsf.h
- components/esp_rom/include/esp_rom_multi_heap.h
  → components/heap/rom_patches/include/rom_patch_multi_heap.h
- components/esp_rom/<target>/ld/<target>.rom.heap.ld (×8)
  → components/heap/port/<target>/ld/<target>.rom.heap.ld

Update heap/CMakeLists.txt to:
- use target_linker_script() directly for *.rom.heap.ld
- guard post-registration ROM patch setup with NOT BOOTLOADER_BUILD
- drop stale CONFIG_HEAP_TLSF_CHECK_PATCH symbol reference
- drop esp_rom_include_multi_heap_patch from TLSF_CHECK_PATCH guard

Remove the corresponding entries from esp_rom/CMakeLists.txt.
2026-04-23 12:21:31 +02:00
Marius Vikhammer 10637dbf5e feat(ulp): add support for ulp on esp32s31 2026-04-20 14:45:23 +08:00
Song Ruo Jing 50051b74a5 feat(clk): support for esp32s31 clock tree 2026-04-02 20:39:59 +08:00
armando c60ed4b338 fix(spm): rename scp (scratchpad) to spm (scratchpad memory) 2026-03-17 01:29:34 +00:00
armando c96f69faef change(mem): deprecated tcm and added scp memory utils 2026-03-11 11:18:15 +08:00
Marius Vikhammer 406d592929 feat(heap): complete ESP32-S31 heap bringup
Remove stale TODO reference from memory_layout.c.
2026-01-28 14:48:02 +08:00
wuzhenghui 4125fd68ac fix(esp_system): fix rom secure boot fast wake feature for c5/c6/h2/h21 2025-12-12 16:04:20 +08:00
C.S.M 0c4cf75c35 feat(esp32s31): Introduce esp32s31 hello world 2025-12-02 10:44:16 +08:00
C.S.M a90c93541c feat(esp32s31): Introduce new target esp32s31 2025-11-17 14:48:55 +08:00
armando a28d9869c1 feat(cache): use icache memroy as diram when single core 2025-11-14 10:35:39 +08:00
Laukik Hase b9a503e9ec feat(esp_tee): Support for ESP32-C61 - the rest of the components 2025-11-07 14:54:16 +05:30
wuzhenghui e9da2e3606 fix(esp_hw_support): add p4 rev3.0 MSPI workaround for deepsleep 2025-10-30 14:50:27 +08:00
wuzhenghui bedcf4ad88 change(esp_hw_support): allocate memory with MALLOC_CAP_RETENTION for regdma link 2025-10-14 16:33:29 +08:00
Guillaume Souchere da9d8a143a feat(heap): Report prohibited usage of MALLOC_CAPS_EXEC at compile time
Add a condition on the definition of the MALLOC_CAP_EXEC macro to
prevent it from being defined if ESP_SYSTEM_MEMPROT_FEATURE or
ESP_SYSTEM_PMP_IDRAM_SPLIT is enabled, thus throwing a compile time
error when using it.

Closes https://github.com/espressif/esp-idf/issues/14837
2025-09-29 10:45:32 +08:00
armando 179d00a6f8 feat(p4): p4 rev3 real chip support 2025-08-28 17:56:16 +08:00
Laukik Hase 340de9823a feat(esp_tee): Support for ESP32-C5 - the rest of the components 2025-08-13 14:08:59 +05:30
harshal.patil 60ff4bca9b refactor(esp_system): Update all references of the memory protection configs 2025-08-04 11:43:01 +05:30
armando bcf04e356b resolve comments, to squash 2025-07-10 06:24:32 +00:00
armando dfb0662de2 feat(esp32p4): support eco5 on fpga 2025-07-10 06:24:32 +00:00
Alexey Lapshin 86ca6ef829 fix(build): fix -Wanalyzer-undefined-behavior-ptrdiff warnings 2025-06-25 18:00:39 +07:00
Laukik Hase 12e2df2d74 feat(esp_tee): Support for ESP32-H2 - the rest of the components 2025-05-20 16:31:23 +05:30
Marius Vikhammer 1256078ea2 feat(esp32h21): added support for misc core system features 2025-04-28 11:42:25 +08:00
Chen Jichang 45ba78940f feat(esp32h4): finnal introduce hello world 2025-03-19 18:48:41 +08:00
Chen Jichang 6f83f39dce feat(esp32h4): introduce target esp32h4(stage 1) 2025-02-08 17:07:44 +08:00
Song Ruo Jing 20eb6ca5e9 feat(heap): add a MALLOC_CAP_SIMD flag
MALLOC_CAP_SIMD can be used to allocate memory to be used for SIMD instructions
2025-01-16 14:39:12 +08:00
gaoxu 25731d0c1e feat(esp32h21): finnal introduce hello world support 2024-12-30 20:14:40 +08:00
Marius Vikhammer 34c7d62855 refactor(hw_support): combine esp_hw_support rtc header to a single file 2024-12-30 10:09:34 +08:00
Guillaume Souchere a995a5339b fix(heap): MALLOC_CAP_EXEC does not allocate in RTC IRAM
This commit fixes the issue when trying to allocate memory
with the MALLOC_CAP_EXEC in RTC memory. Prior to the fix,
the heap allocator was returning an address in RTC DRAM.

To fix this issue:
- modified memory_layout.c of the concerned targets to fill the iram_address
field in the rtc entry of the soc_memory_region array properly.
- modified heap component  related functions to return IRAM address when
an allocation in RTC memory with MALLOC_CAP_EXEC is requested.

Closes https://github.com/espressif/esp-idf/issues/14835
2024-12-09 09:34:56 +01:00
Laukik Hase 733741bbac feat(esp_tee): Support for ESP-TEE - esp_system component 2024-12-02 12:20:04 +05:30
Guillaume Souchere 793382107f fix(heap): Fix wrong config to enable MALLOC_CAP_EXEC in memory_layout.c
In esp32c2 and esp32c61 memory_layout.c files, the config used to allow
MALLOC_CAP_EXEC was CONFIG_ESP_SYSTEM_MEMPROT_FEATURE when
CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT should be used.

Closes https://github.com/espressif/esp-idf/issues/14836
2024-11-25 11:46:02 +01:00
gaoxu 64bbb53b8f feat(esp32h21): introduce target esp32h21(stage 1) 2024-11-12 15:42:27 +08:00
Guillaume Souchere f0903aef6b feat(heap): Add test support for esp32c61 2024-09-19 09:53:45 +02:00
Guillaume Souchere 200241b9aa feat(heap): Add support for esp32c61 2024-09-16 14:44:57 +02:00
Marius Vikhammer 520fda61cd feat(system): remove references to RTC mem on C61 2024-09-04 11:16:36 +08:00
Armando 67b8dbb5e5 feat(cache): supported cache on c61 2024-08-01 09:34:18 +08:00
laokaiyao 21f870ecd5 remove(c5beta3): remove c5 beta3 system files 2024-06-17 12:02:15 +08:00
Guillaume Souchere d5e4f419f3 change(heap): Remove todo of closed ticket in memory_layout.c files
Leftover closed ticket removed from memory_layout.c on
the following targets:
- esp32c5
- esp32c6
- esp32h2
2024-05-21 10:40:22 +02:00
Guillaume Souchere 32559d51d6 change(heap): Update soc_memory_regions on esp32c5
The array of memory regions is simplyfied by using the
macro defined in soc.h (for beta3 and mp respectively).
2024-05-21 10:40:22 +02:00
Marius Vikhammer 4533f16c34 fix(rtc_memory): fix conflict between LP-ROM and RTC reserved 2024-04-17 13:37:56 +08:00
wanlei 20c18ac52b feat(esp32c61): final introduce helloworld support 2024-04-02 10:50:52 +08:00
Kevin (Lao Kaiyao) 4cd30f9b8f Merge branch 'feature/esp32c5_mp_bringup' into 'master'
feat(esp32c5): bringup esp32c5 mp (Stage 7/7: hello world)

See merge request espressif/esp-idf!29093
2024-03-22 11:18:52 +08:00
Alexey Lapshin e845d9e0eb feat(esp_system): allow .data to spill over into L2MEM above 0x4ff40000
It may be usefull when .rodata placed into .dram1.data
2024-03-21 15:36:39 +04:00
laokaiyao c9d6a11d1d feat(esp32c5mp): support to run hello world on esp32c5 mp 2024-03-21 16:18:03 +08:00
Mahavir Jain fd6c710b27 fix: cleanup memprot files for C6/H2/P4
There is no separate permission control peripheral in C6/H2/P4.
Memory protection is achieved using built-in PMA/PMP and hence
removing permission control specific files.
2024-03-11 17:10:40 +05:30
wanlei ee02b71f1c feat(esp32c61): introduce target esp32c61 2024-03-01 21:12:25 +08:00