- Adding buffer DMA for USB Host
- Only non-periodic transfers (CTRL and BULK)
- Periodic transfers (INTR, ISOC) will be added separately
- Existing Scatter/Gather DMA is still used as a default DMA mode
- DMA mode selection done in the USB host's component Kconfig
- Fixing RXFIFO extra lines for status quadlets when the bias is set to periodic OUT
- DWC Guide specifies +2 FIFO lines for status quadlets
- This was tested not to be enough and +3 lines are required instead
- A device with 512 byte IN EP never completes it's transfer otherwise
- fixes https://github.com/espressif/esp-idf/issues/19143
fix(esp_hal_usb): Correct transfer size limit for Scatter/Gather DMA
usb_dwc_hal_get_xfer_size_limit() computed the limit from the GHWCFG3
transfer/packet counter widths (OTG_TRANS_COUNT_WIDTH and
OTG_PACKET_COUNT_WIDTH), i.e. the HCTSIZ.XferSize and HCTSIZ.PktCnt
fields.
In Scatter/Gather DMA mode those HCTSIZ bits do not exist.
The per-transfer byte count is programmed in the non-isochronous
qTD's 17-bit "Total bytes to transfer" field.
Add function usb_dwc_hal_init_with_config() that takes a bitmap
of configuration flags.
Currently only FS/LS only flag is implemented, but the design
allows extension in the future.
Add ESP32-S31 USB DWC/UTMI LL headers, SoC register structures, peripheral
descriptors, capabilities, and linker mappings so the HS OTG controller and
UTMI PHY can be built in esp_hal_usb.
Introduce SOC_USB_FSLS_PHY_NUM on USB-OTG targets to separate FSLS USB_WRAP
support from OTG/UTMI support. Use it to gate usb_wrap, the USB PHY driver,
docs, and example build rules on targets without an FSLS PHY.
Also add UTMI data pulldown control to the HAL, clear the boot-time DWC
suspend state on ESP32-S31, alias the legacy internal PHY target to UTMI for
backward compatibility, and extend usb_phy tests for UTMI-only targets.
peter.marcisovsky
Tomas Rezucha
JiangGuangMing
igor.masar
C.S.M
wanckl
morris