feat(temperature_sensor): Add temperature sensor support for esp32h21

components/esp_driver_tsens/esp32h21/temperature_sensor_retention.c

@@ -0,0 +1,33 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <stdint.h>
+#include "soc/regdma.h"
+#include "soc/apb_saradc_reg.h"
+#include "temperature_sensor_private.h"
+
+// Temperature sensor sleep retention entries
+// Temperature sensor registers require set the reg_update bit to make the configuration take effect
+
+/* Temperature sensor Registers Context
+   Include: APB_SARADC_INT_ENA_REG /
+            APB_SARADC_APB_TSENS_CTRL_REG / APB_SARADC_TSENS_CTRL2_REG / APB_TSENS_WAKE_REG / APB_TSENS_SAMPLE_REG
+*/
+#define TEMPERATURE_SENSOR_RETENTION_REGS_CNT  5
+#define TEMPERATURE_SENSOR_RETENTION_MAP_BASE  APB_SARADC_INT_ENA_REG
+static const uint32_t temperature_sensor_regs_map[4] = {0x6c1, 0, 0, 0};
+static const regdma_entries_config_t temperature_sensor_regs_entries[] = {
+    [0] = {
+        .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_TSENS_LINK(0x00), TEMPERATURE_SENSOR_RETENTION_MAP_BASE, TEMPERATURE_SENSOR_RETENTION_MAP_BASE, TEMPERATURE_SENSOR_RETENTION_REGS_CNT, 0, 0, temperature_sensor_regs_map[0], temperature_sensor_regs_map[1], temperature_sensor_regs_map[2], temperature_sensor_regs_map[3]), \
+        .owner = ENTRY(0) | ENTRY(2)
+    }, \
+};
+
+const temperature_sensor_reg_ctx_link_t temperature_sensor_regs_retention = {
+    .link_list = temperature_sensor_regs_entries,
+    .link_num = ARRAY_SIZE(temperature_sensor_regs_entries),
+    .module_id = SLEEP_RETENTION_MODULE_TEMP_SENSOR,
+};

components/esp_driver_tsens/test_apps/temperature_sensor/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 |
+| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 |
-| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | -------- | --------- |
+| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | --------- |

components/esp_hal_ana_conv/esp32h21/include/hal/temperature_sensor_ll.h

@@ -0,0 +1,320 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*******************************************************************************
+ * NOTICE
+ * The hal is not public api, don't use in application code.
+ * See readme.md in component/hal/readme.md
+ ******************************************************************************/
+
+// The LL for temperature sensor
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdlib.h>
+#include "hal/regi2c_ctrl.h"
+#include "soc/regi2c_saradc.h"
+#include "soc/apb_saradc_struct.h"
+#include "soc/apb_saradc_reg.h"
+#include "soc/soc.h"
+#include "soc/soc_caps.h"
+#include "soc/pcr_struct.h"
+#include "soc/interrupts.h"
+#include "soc/soc_etm_source.h"
+#include "hal/temperature_sensor_types.h"
+#include "hal/assert.h"
+#include "hal/misc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define TEMPERATURE_SENSOR_LL_ADC_FACTOR     (0.4386)
+#define TEMPERATURE_SENSOR_LL_DAC_FACTOR     (27.88)
+#define TEMPERATURE_SENSOR_LL_OFFSET_FACTOR  (20.52)
+#define TEMPERATURE_SENSOR_LL_ADC_FACTOR_INT     (4386)
+#define TEMPERATURE_SENSOR_LL_DAC_FACTOR_INT     (278800)
+#define TEMPERATURE_SENSOR_LL_OFFSET_FACTOR_INT  (205200)
+#define TEMPERATURE_SENSOR_LL_DENOMINATOR    (10000)
+#define TEMPERATURE_SENSOR_LL_MEASURE_MAX    (125)
+#define TEMPERATURE_SENSOR_LL_MEASURE_MIN    (-40)
+
+#define TEMPERATURE_SENSOR_LL_INTR_MASK      APB_SARADC_APB_SARADC_TSENS_INT_ST
+
+#define TEMPERATURE_SENSOR_LL_ETM_EVENT_TABLE(event)                     \
+    (uint32_t [TEMPERATURE_SENSOR_EVENT_MAX]){                           \
+        [TEMPERATURE_SENSOR_EVENT_OVER_LIMIT] = TMPSNSR_EVT_OVER_LIMIT,  \
+    }[event]
+
+#define TEMPERATURE_SENSOR_LL_ETM_TASK_TABLE(task)                     \
+    (uint32_t [TEMPERATURE_SENSOR_TASK_MAX]){                           \
+        [TEMPERATURE_SENSOR_TASK_START] = TMPSNSR_TASK_START_SAMPLE,    \
+        [TEMPERATURE_SENSOR_TASK_STOP] = TMPSNSR_TASK_STOP_SAMPLE,      \
+    }[task]
+
+typedef enum {
+    TEMPERATURE_SENSOR_LL_WAKE_ABSOLUTE = 0,
+    TEMPERATURE_SENSOR_LL_WAKE_DELTA = 1,
+} temperature_sensor_ll_wakeup_mode_t;
+
+/**
+ * @brief Enable the temperature sensor power.
+ *
+ * @param enable true: enable the power.
+ */
+static inline void temperature_sensor_ll_enable(bool enable)
+{
+    APB_SARADC.saradc_apb_tsens_ctrl.saradc_tsens_pu = enable;
+}
+
+/**
+ * @brief Enable the clock
+ */
+static inline void temperature_sensor_ll_bus_clk_enable(bool enable)
+{
+    PCR.tsens_clk_conf.tsens_clk_en = enable;
+}
+
+/**
+ * @brief Reset the Temperature sensor module
+ */
+static inline void temperature_sensor_ll_reset_module(void)
+{
+    PCR.tsens_clk_conf.tsens_rst_en = 1;
+    PCR.tsens_clk_conf.tsens_rst_en = 0;
+}
+
+/**
+ * @brief Select the clock source for temperature sensor. On ESP32-H21, temperature sensor
+ *        can use XTAL or RC_FAST. Suggest using XTAL for better accuracy.
+ *
+ * @param clk_src refer to ``temperature_sensor_clk_src_t``
+ */
+static inline void temperature_sensor_ll_clk_sel(temperature_sensor_clk_src_t clk_src)
+{
+    uint8_t clk_sel = 0;
+    switch (clk_src) {
+    case TEMPERATURE_SENSOR_CLK_SRC_XTAL:
+        clk_sel = 1;
+        break;
+    case TEMPERATURE_SENSOR_CLK_SRC_RC_FAST:
+        clk_sel = 0;
+        break;
+    default:
+        HAL_ASSERT(false);
+        break;
+    }
+    PCR.tsens_clk_conf.tsens_clk_sel = clk_sel;
+}
+
+/**
+ * @brief Set the hardware range, you can refer to the table ``temperature_sensor_attributes``
+ *
+ * @param tsens_dac ``reg_val`` in table ``temperature_sensor_attributes``
+ */
+__attribute__((always_inline))
+static inline void temperature_sensor_ll_set_range(uint32_t range)
+{
+    REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_TSENS_DAC, range);
+}
+
+/**
+ * @brief Get the raw value of temperature sensor.
+ *
+ * @return uint32_t raw_value
+ */
+__attribute__((always_inline))
+static inline uint32_t temperature_sensor_ll_get_raw_value(void)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(APB_SARADC.saradc_apb_tsens_ctrl, saradc_tsens_out);
+}
+
+/**
+ * @brief Get the offset value of temperature sensor.
+ *
+ * @note This function is only used in legacy driver
+ *
+ * @return uint32_t offset value
+ */
+__attribute__((always_inline))
+static inline uint32_t temperature_sensor_ll_get_offset(void)
+{
+    return REGI2C_READ_MASK(I2C_SAR_ADC, I2C_SARADC_TSENS_DAC);
+}
+
+/**
+ * @brief Get the clock division factor value.
+ *
+ * @note This function is only used in legacy driver
+ *
+ * @return uint32_t clock division factor
+ */
+static inline uint32_t temperature_sensor_ll_get_clk_div(void)
+{
+    return HAL_FORCE_READ_U32_REG_FIELD(APB_SARADC.saradc_apb_tsens_ctrl, saradc_tsens_clk_div);
+}
+
+/**
+ * @brief Set the clock division factor value, actually this has no impact on temperature sensor.
+ *        Suggest just keep it as default value 6.
+ *
+ * @note This function is only used in legacy driver
+ *
+ * @param clk_div clock division factor, range from 1-10
+ */
+static inline void temperature_sensor_ll_set_clk_div(uint8_t clk_div)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_apb_tsens_ctrl, saradc_tsens_clk_div, clk_div);
+}
+
+/**
+ * @brief Choose the wake-up mode for temperature sensor
+ *
+ * @param mode 0: Absolute value mode. 1: Difference mode.
+ */
+static inline void temperature_sensor_ll_wakeup_mode(temperature_sensor_ll_wakeup_mode_t mode)
+{
+    APB_SARADC.tsens_wake.saradc_wakeup_mode = mode;
+}
+
+/**
+ * @brief Get temperature sensor interrupt/wakeup in which reason
+ *
+ * @return uint8_t 0: temperature value lower than low threshold 1: otherwise, higher than high threshold.
+ */
+__attribute__((always_inline))
+static inline uint8_t temperature_sensor_ll_get_wakeup_reason(void)
+{
+    return APB_SARADC.tsens_wake.saradc_wakeup_over_upper_th;
+}
+
+/**
+ * @brief Configure whether to enable temperature sensor wake up
+ *
+ * @param en true: enable, false: disable.
+ */
+static inline void temperature_sensor_ll_wakeup_enable(bool en)
+{
+    APB_SARADC.tsens_wake.saradc_wakeup_en = en;
+}
+
+/**
+ * @brief Configures the low threshold for temperature sensor to wakeup
+ *
+ * @param th_low low threshold value.
+ */
+static inline void temperature_sensor_ll_set_th_low_val(uint8_t th_low)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.tsens_wake, saradc_wakeup_th_low, th_low);
+}
+
+/**
+ * @brief Configures the high threshold for temperature sensor to wakeup
+ *
+ * @param th_high high threshold value.
+ */
+static inline void temperature_sensor_ll_set_th_high_val(uint8_t th_high)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.tsens_wake, saradc_wakeup_th_high, th_high);
+}
+
+/**
+ * @brief Enable temperature sensor interrupt
+ *
+ * @param enable true: enable. false: disable
+ */
+static inline void temperature_sensor_ll_enable_intr(bool enable)
+{
+    APB_SARADC.saradc_int_ena.saradc_apb_saradc_tsens_int_ena = enable;
+}
+
+/**
+ * @brief Clear temperature sensor interrupt
+ */
+__attribute__((always_inline))
+static inline void temperature_sensor_ll_clear_intr(void)
+{
+    APB_SARADC.saradc_int_clr.saradc_apb_saradc_tsens_int_clr = 1;
+}
+
+/**
+ * @brief Get temperature sensor interrupt status.
+ */
+static inline volatile void *temperature_sensor_ll_get_intr_status(void)
+{
+    return &APB_SARADC.saradc_int_st;
+}
+
+/**
+ * @brief Configure whether to enable hardware sampling
+ *
+ * @param en true: enable, false: disable
+ */
+static inline void temperature_sensor_ll_sample_enable(bool en)
+{
+    APB_SARADC.tsens_sample.saradc_tsens_sample_en = en;
+}
+
+/**
+ * @brief Configures the hardware sampling rate
+ *
+ * @param rate sampling rate
+ */
+static inline void temperature_sensor_ll_set_sample_rate(uint16_t rate)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.tsens_sample, saradc_tsens_sample_rate, rate);
+}
+
+/**
+ * @brief Retrieve and calculate the temperature sensor calibration value.
+ *
+ * @return Temperature calibration value.
+ */
+static inline int temperature_sensor_ll_load_calib_param(void)
+{
+    return 0; // IDF-15912: eFuse calibration layout not available yet
+}
+
+/**
+ * @brief Structure for temperature sensor related register values
+ */
+typedef struct {
+    uint32_t tsens_ctrl;      // Temperature sensor control register (APB_SARADC_APB_TSENS_CTRL_REG)
+    uint32_t tsens_ctrl2;     // Temperature sensor control register 2 (APB_SARADC_TSENS_CTRL2_REG)
+    uint32_t tsens_wake;      // Temperature sensor wake register (APB_TSENS_WAKE_REG)
+    uint32_t tsens_sample;    // Temperature sensor sample register (APB_TSENS_SAMPLE_REG)
+} tsens_ll_reg_values_t;
+
+/**
+ * @brief Read temperature sensor related ADC register values for backup
+ *
+ * @param reg_values Output parameter, pointer to structure for storing register values
+ */
+static inline void tsens_ll_backup_registers(tsens_ll_reg_values_t *reg_values)
+{
+    reg_values->tsens_ctrl = APB_SARADC.saradc_apb_tsens_ctrl.val;
+    reg_values->tsens_ctrl2 = APB_SARADC.saradc_tsens_ctrl2.val;
+    reg_values->tsens_wake = APB_SARADC.tsens_wake.val;
+    reg_values->tsens_sample = APB_SARADC.tsens_sample.val;
+}
+
+/**
+ * @brief Restore temperature sensor related ADC register values from backup
+ *
+ * @param reg_values Input parameter, pointer to structure containing register values to restore
+ */
+static inline void tsens_ll_restore_registers(const tsens_ll_reg_values_t *reg_values)
+{
+    APB_SARADC.saradc_apb_tsens_ctrl.val = reg_values->tsens_ctrl;
+    APB_SARADC.saradc_tsens_ctrl2.val = reg_values->tsens_ctrl2;
+    APB_SARADC.tsens_wake.val = reg_values->tsens_wake;
+    APB_SARADC.tsens_sample.val = reg_values->tsens_sample;
+}
+
+#ifdef __cplusplus
+}
+#endif

components/esp_hal_ana_conv/esp32h21/temperature_sensor_periph.c

@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "hal/temperature_sensor_periph.h"
+
+const temperature_sensor_attribute_t temperature_sensor_attributes[TEMPERATURE_SENSOR_ATTR_RANGE_NUM] = {
+    /*Offset   reg_val  min  max  error */
+    {-2,     5,    50,  125,   3},
+    {-1,     7,    20,  100,   2},
+    { 0,    15,   -10,   80,   1},
+    { 1,    11,   -30,   50,   2},
+    { 2,    10,   -40,   20,   3},
+};

components/esp_hw_support/port/esp32h21/sar_periph_ctrl.c

@@ -22,8 +22,10 @@
 #include "esp_private/esp_modem_clock.h"
 #include "esp_private/critical_section.h"
 #include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/periph_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
 #include "hal/adc_ll.h"
+#include "hal/temperature_sensor_ll.h"
 
 ESP_LOG_ATTR_TAG(TAG, "sar_periph_ctrl");
 extern portMUX_TYPE rtc_spinlock;

components/soc/esp32h21/include/soc/Kconfig.soc_caps.in

@@ -55,6 +55,10 @@ config SOC_USB_SERIAL_JTAG_SUPPORTED
     bool
     default y
 
+config SOC_TEMP_SENSOR_SUPPORTED
+    bool
+    default y
+
 config SOC_EFUSE_KEY_PURPOSE_FIELD
     bool
     default y
@@ -1063,6 +1067,30 @@ config SOC_RCC_IS_INDEPENDENT
     bool
     default y
 
+config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
+    bool
+    default y
+
+config SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL
+    bool
+    default y
+
+config SOC_TEMPERATURE_SENSOR_INTR_SUPPORT
+    bool
+    default y
+
+config SOC_TEMPERATURE_SENSOR_SUPPORT_ETM
+    bool
+    default y
+
+config SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION
+    bool
+    default y
+
+config SOC_TEMPERATURE_SENSOR_UNDER_PD_TOP_DOMAIN
+    bool
+    default y
+
 config SOC_BLE_SUPPORTED
     bool
     default y

components/soc/esp32h21/include/soc/clk_tree_defs.h

@@ -275,6 +275,22 @@ typedef enum {
     PCNT_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,       /*!< Select APB as the default choice */
 } soc_periph_pcnt_clk_src_t;
 
+//////////////////////////////////////////////////Temp Sensor///////////////////////////////////////////////////////////
+
+/**
+ * @brief Array initializer for all supported clock sources of Temperature Sensor
+ */
+#define SOC_TEMP_SENSOR_CLKS {SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST}
+
+/**
+ * @brief Type of Temp Sensor clock source
+ */
+typedef enum {
+    TEMPERATURE_SENSOR_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,       /*!< Select XTAL as the source clock */
+    TEMPERATURE_SENSOR_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
+    TEMPERATURE_SENSOR_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,    /*!< Select XTAL as the default choice */
+} soc_periph_temperature_sensor_clk_src_t;
+
 ///////////////////////////////////////////////////UART/////////////////////////////////////////////////////////////////
 
 /**

components/soc/esp32h21/include/soc/interrupts.h

@@ -64,8 +64,9 @@ typedef enum {
     ETS_SYSTIMER_TARGET0_INTR_SOURCE,
     ETS_SYSTIMER_TARGET1_INTR_SOURCE,
     ETS_SYSTIMER_TARGET2_INTR_SOURCE,
-    ETS_APB_ADC_INTR_SOURCE,
+    ETS_APB_ADC_INTR_SOURCE = 48,
-    ETS_PWM_INTR_SOURCE,
+    ETS_TEMPERATURE_SENSOR_INTR_SOURCE = ETS_APB_ADC_INTR_SOURCE,
+    ETS_PWM_INTR_SOURCE = 49,
     ETS_PCNT_INTR_SOURCE,
     ETS_PARL_IO_TX_INTR_SOURCE,
     ETS_PARL_IO_RX_INTR_SOURCE,

components/soc/esp32h21/include/soc/soc_caps.h

@@ -36,7 +36,7 @@
 #define SOC_IEEE802154_BLE_ONLY         1
 #define SOC_ASYNC_MEMCPY_SUPPORTED      1
 #define SOC_USB_SERIAL_JTAG_SUPPORTED   1
-// #define SOC_TEMP_SENSOR_SUPPORTED       1    //TODO: [ESP32H21] IDF-11624
+#define SOC_TEMP_SENSOR_SUPPORTED       1
 // #define SOC_SUPPORTS_SECURE_DL_MODE     1
 // #define SOC_ULP_SUPPORTED               1
 #define SOC_EFUSE_KEY_PURPOSE_FIELD     1
@@ -472,10 +472,12 @@
 #define SOC_RCC_IS_INDEPENDENT                    1       /*!< Reset and Clock Control is independent, thanks to the PCR registers */
 
 /*-------------------------- Temperature Sensor CAPS -------------------------------------*/
-// #define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC                (1)
+#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC                (1)
-// #define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL                   (1)
+#define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL                   (1)
-// #define SOC_TEMPERATURE_SENSOR_INTR_SUPPORT                   (1)
+#define SOC_TEMPERATURE_SENSOR_INTR_SUPPORT                   (1)
-// #define SOC_TEMPERATURE_SENSOR_SUPPORT_ETM                    (1)
+#define SOC_TEMPERATURE_SENSOR_SUPPORT_ETM                    (1)
+#define SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION        (1)
+#define SOC_TEMPERATURE_SENSOR_UNDER_PD_TOP_DOMAIN            (1)
 
 /*--------------------------------- RNG CAPS --------------------------------------------*/
 // #define SOC_RNG_CLOCK_IS_INDEPENDENT                          (1)

components/soc/esp32h21/register/soc/apb_saradc_reg.h

@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0 OR MIT
  */
@@ -13,7 +13,7 @@ extern "C" {
 /** APB_SARADC_CTRL_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_CTRL_REG (DR_REG_APB_BASE + 0x0)
+#define APB_SARADC_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x0)
 /** APB_SARADC_SARADC_START_FORCE : R/W; bitpos: [0]; default: 0;
  *  select software enable saradc sample
  */
@@ -81,7 +81,7 @@ extern "C" {
 /** APB_SARADC_CTRL2_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_CTRL2_REG (DR_REG_APB_BASE + 0x4)
+#define APB_SARADC_CTRL2_REG (DR_REG_APB_SARADC_BASE + 0x4)
 /** APB_SARADC_SARADC_MEAS_NUM_LIMIT : R/W; bitpos: [0]; default: 0;
  *  enable max meas num
  */
@@ -128,7 +128,7 @@ extern "C" {
 /** APB_SARADC_FILTER_CTRL1_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_FILTER_CTRL1_REG (DR_REG_APB_BASE + 0x8)
+#define APB_SARADC_FILTER_CTRL1_REG (DR_REG_APB_SARADC_BASE + 0x8)
 /** APB_SARADC_APB_SARADC_FILTER_FACTOR1 : R/W; bitpos: [28:26]; default: 0;
  *  Factor of saradc filter1
  */
@@ -147,7 +147,7 @@ extern "C" {
 /** APB_SARADC_SAR_PATT_TAB1_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_SAR_PATT_TAB1_REG (DR_REG_APB_BASE + 0x18)
+#define APB_SARADC_SAR_PATT_TAB1_REG (DR_REG_APB_SARADC_BASE + 0x18)
 /** APB_SARADC_SARADC_SAR_PATT_TAB1 : R/W; bitpos: [23:0]; default: 16777215;
  *  item 0 ~ 3 for pattern table 1 (each item one byte)
  */
@@ -159,7 +159,7 @@ extern "C" {
 /** APB_SARADC_SAR_PATT_TAB2_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_SAR_PATT_TAB2_REG (DR_REG_APB_BASE + 0x1c)
+#define APB_SARADC_SAR_PATT_TAB2_REG (DR_REG_APB_SARADC_BASE + 0x1c)
 /** APB_SARADC_SARADC_SAR_PATT_TAB2 : R/W; bitpos: [23:0]; default: 16777215;
  *  Item 4 ~ 7 for pattern table 1 (each item one byte)
  */
@@ -171,7 +171,7 @@ extern "C" {
 /** APB_SARADC_ONETIME_SAMPLE_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_ONETIME_SAMPLE_REG (DR_REG_APB_BASE + 0x20)
+#define APB_SARADC_ONETIME_SAMPLE_REG (DR_REG_APB_SARADC_BASE + 0x20)
 /** APB_SARADC_SARADC_ONETIME_ATTEN : R/W; bitpos: [24:23]; default: 0;
  *  configure onetime atten
  */
@@ -211,7 +211,7 @@ extern "C" {
 /** APB_SARADC_ARB_CTRL_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_ARB_CTRL_REG (DR_REG_APB_BASE + 0x24)
+#define APB_SARADC_ARB_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x24)
 /** APB_SARADC_ADC_ARB_APB_FORCE : R/W; bitpos: [2]; default: 0;
  *  adc2 arbiter force to enableapb controller
  */
@@ -272,7 +272,7 @@ extern "C" {
 /** APB_SARADC_FILTER_CTRL0_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_FILTER_CTRL0_REG (DR_REG_APB_BASE + 0x28)
+#define APB_SARADC_FILTER_CTRL0_REG (DR_REG_APB_SARADC_BASE + 0x28)
 /** APB_SARADC_APB_SARADC_FILTER_CHANNEL1 : R/W; bitpos: [21:18]; default: 13;
  *  configure filter1 to adc channel
  */
@@ -298,7 +298,7 @@ extern "C" {
 /** APB_SARADC_SAR1DATA_STATUS_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_SAR1DATA_STATUS_REG (DR_REG_APB_BASE + 0x2c)
+#define APB_SARADC_SAR1DATA_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x2c)
 /** APB_SARADC_APB_SARADC1_DATA : RO; bitpos: [16:0]; default: 0;
  *  saradc1 data
  */
@@ -310,7 +310,7 @@ extern "C" {
 /** APB_SARADC_SAR2DATA_STATUS_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_SAR2DATA_STATUS_REG (DR_REG_APB_BASE + 0x30)
+#define APB_SARADC_SAR2DATA_STATUS_REG (DR_REG_APB_SARADC_BASE + 0x30)
 /** APB_SARADC_APB_SARADC2_DATA : RO; bitpos: [16:0]; default: 0;
  *  saradc2 data
  */
@@ -322,7 +322,7 @@ extern "C" {
 /** APB_SARADC_THRES0_CTRL_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_THRES0_CTRL_REG (DR_REG_APB_BASE + 0x34)
+#define APB_SARADC_THRES0_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x34)
 /** APB_SARADC_APB_SARADC_THRES0_CHANNEL : R/W; bitpos: [3:0]; default: 13;
  *  configure thres0 to adc channel
  */
@@ -348,7 +348,7 @@ extern "C" {
 /** APB_SARADC_THRES1_CTRL_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_THRES1_CTRL_REG (DR_REG_APB_BASE + 0x38)
+#define APB_SARADC_THRES1_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x38)
 /** APB_SARADC_APB_SARADC_THRES1_CHANNEL : R/W; bitpos: [3:0]; default: 13;
  *  configure thres1 to adc channel
  */
@@ -374,7 +374,7 @@ extern "C" {
 /** APB_SARADC_THRES_CTRL_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_THRES_CTRL_REG (DR_REG_APB_BASE + 0x3c)
+#define APB_SARADC_THRES_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x3c)
 /** APB_SARADC_APB_SARADC_THRES_ALL_EN : R/W; bitpos: [27]; default: 0;
  *  enable thres to all channel
  */
@@ -400,7 +400,7 @@ extern "C" {
 /** APB_SARADC_INT_ENA_REG register
  *  digital saradc int register
  */
-#define APB_SARADC_INT_ENA_REG (DR_REG_APB_BASE + 0x40)
+#define APB_SARADC_INT_ENA_REG (DR_REG_APB_SARADC_BASE + 0x40)
 /** APB_SARADC_APB_SARADC_TSENS_INT_ENA : R/W; bitpos: [25]; default: 0;
  *  tsens low  interrupt enable
  */
@@ -454,7 +454,7 @@ extern "C" {
 /** APB_SARADC_INT_RAW_REG register
  *  digital saradc int register
  */
-#define APB_SARADC_INT_RAW_REG (DR_REG_APB_BASE + 0x44)
+#define APB_SARADC_INT_RAW_REG (DR_REG_APB_SARADC_BASE + 0x44)
 /** APB_SARADC_APB_SARADC_TSENS_INT_RAW : R/WTC/SS; bitpos: [25]; default: 0;
  *  saradc tsens  interrupt raw
  */
@@ -508,7 +508,7 @@ extern "C" {
 /** APB_SARADC_INT_ST_REG register
  *  digital saradc int register
  */
-#define APB_SARADC_INT_ST_REG (DR_REG_APB_BASE + 0x48)
+#define APB_SARADC_INT_ST_REG (DR_REG_APB_SARADC_BASE + 0x48)
 /** APB_SARADC_APB_SARADC_TSENS_INT_ST : RO; bitpos: [25]; default: 0;
  *  saradc tsens  interrupt state
  */
@@ -562,7 +562,7 @@ extern "C" {
 /** APB_SARADC_INT_CLR_REG register
  *  digital saradc int register
  */
-#define APB_SARADC_INT_CLR_REG (DR_REG_APB_BASE + 0x4c)
+#define APB_SARADC_INT_CLR_REG (DR_REG_APB_SARADC_BASE + 0x4c)
 /** APB_SARADC_APB_SARADC_TSENS_INT_CLR : WT; bitpos: [25]; default: 0;
  *  saradc tsens  interrupt clear
  */
@@ -616,7 +616,7 @@ extern "C" {
 /** APB_SARADC_DMA_CONF_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_DMA_CONF_REG (DR_REG_APB_BASE + 0x50)
+#define APB_SARADC_DMA_CONF_REG (DR_REG_APB_SARADC_BASE + 0x50)
 /** APB_SARADC_APB_ADC_EOF_NUM : R/W; bitpos: [15:0]; default: 255;
  *  the dma_in_suc_eof gen when sample cnt = spi_eof_num
  */
@@ -642,7 +642,7 @@ extern "C" {
 /** APB_SARADC_CLKM_CONF_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_CLKM_CONF_REG (DR_REG_APB_BASE + 0x54)
+#define APB_SARADC_CLKM_CONF_REG (DR_REG_APB_SARADC_BASE + 0x54)
 /** APB_SARADC_CLKM_DIV_NUM : R/W; bitpos: [7:0]; default: 4;
  *  Integral I2S clock divider value
  */
@@ -682,7 +682,7 @@ extern "C" {
 /** APB_SARADC_APB_TSENS_CTRL_REG register
  *  digital tsens configure register
  */
-#define APB_SARADC_APB_TSENS_CTRL_REG (DR_REG_APB_BASE + 0x58)
+#define APB_SARADC_APB_TSENS_CTRL_REG (DR_REG_APB_SARADC_BASE + 0x58)
 /** APB_SARADC_TSENS_OUT : RO; bitpos: [7:0]; default: 128;
  *  temperature sensor data out
  */
@@ -715,7 +715,7 @@ extern "C" {
 /** APB_SARADC_TSENS_CTRL2_REG register
  *  digital tsens configure register
  */
-#define APB_SARADC_TSENS_CTRL2_REG (DR_REG_APB_BASE + 0x5c)
+#define APB_SARADC_TSENS_CTRL2_REG (DR_REG_APB_SARADC_BASE + 0x5c)
 /** APB_SARADC_TSENS_CLK_SEL : R/W; bitpos: [15]; default: 0;
  *  tsens clk select
  */
@@ -727,7 +727,7 @@ extern "C" {
 /** APB_SARADC_CALI_REG register
  *  digital saradc configure register
  */
-#define APB_SARADC_CALI_REG (DR_REG_APB_BASE + 0x60)
+#define APB_SARADC_CALI_REG (DR_REG_APB_SARADC_BASE + 0x60)
 /** APB_SARADC_APB_SARADC_CALI_CFG : R/W; bitpos: [16:0]; default: 32768;
  *  saradc cali factor
  */
@@ -739,7 +739,7 @@ extern "C" {
 /** APB_TSENS_WAKE_REG register
  *  digital tsens configure register
  */
-#define APB_TSENS_WAKE_REG (DR_REG_APB_BASE + 0x64)
+#define APB_TSENS_WAKE_REG (DR_REG_APB_SARADC_BASE + 0x64)
 /** APB_SARADC_WAKEUP_TH_LOW : R/W; bitpos: [7:0]; default: 0;
  *  reg_wakeup_th_low
  */
@@ -779,7 +779,7 @@ extern "C" {
 /** APB_TSENS_SAMPLE_REG register
  *  digital tsens configure register
  */
-#define APB_TSENS_SAMPLE_REG (DR_REG_APB_BASE + 0x68)
+#define APB_TSENS_SAMPLE_REG (DR_REG_APB_SARADC_BASE + 0x68)
 /** APB_SARADC_TSENS_SAMPLE_RATE : R/W; bitpos: [15:0]; default: 20;
  *  HW sample rate
  */
@@ -798,7 +798,7 @@ extern "C" {
 /** APB_SARADC_CTRL_DATE_REG register
  *  version
  */
-#define APB_SARADC_CTRL_DATE_REG (DR_REG_APB_BASE + 0x3fc)
+#define APB_SARADC_CTRL_DATE_REG (DR_REG_APB_SARADC_BASE + 0x3fc)
 /** APB_SARADC_DATE : R/W; bitpos: [31:0]; default: 35676736;
  *  version
  */

examples/peripherals/temperature_sensor/temp_sensor/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 |
+| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 |
-| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | -------- | --------- |
+| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | --------- |
 
 # Temperature Sensor Example
 

examples/peripherals/temperature_sensor/temp_sensor_monitor/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H4 | ESP32-P4 | ESP32-S31 |
+| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S31 |
-| ----------------- | -------- | -------- | --------- | -------- | -------- | -------- | --------- |
+| ----------------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | --------- |
 
 # Temperature Sensor Interrupt Example