From ffd41dc3e1c2fc8b81907043efa1cc4605aef0eb Mon Sep 17 00:00:00 2001 From: Sudeep Mohanty Date: Wed, 8 Apr 2026 13:27:30 +0200 Subject: [PATCH] fix(lp_core): fix LP UART init parameter validation Align data_bits, flow_ctrl, and rx_flow_ctrl_thresh checks with uart_param_config(). Made-with: Cursor --- components/ulp/lp_core/lp_core_uart.c | 6 ++--- .../main/test_lp_core_uart.c | 22 ++++++++++++++++++- 2 files changed, 24 insertions(+), 4 deletions(-) diff --git a/components/ulp/lp_core/lp_core_uart.c b/components/ulp/lp_core/lp_core_uart.c index 89223de4c7e..781f39dd27f 100644 --- a/components/ulp/lp_core/lp_core_uart.c +++ b/components/ulp/lp_core/lp_core_uart.c @@ -34,9 +34,9 @@ static esp_err_t lp_core_uart_param_config(const lp_core_uart_cfg_t *cfg) esp_err_t ret = ESP_OK; /* Argument sanity check */ - if ((cfg->uart_proto_cfg.rx_flow_ctrl_thresh > SOC_LP_UART_FIFO_LEN) || - (cfg->uart_proto_cfg.flow_ctrl > UART_HW_FLOWCTRL_MAX) || - (cfg->uart_proto_cfg.data_bits > UART_DATA_BITS_MAX)) { + if ((cfg->uart_proto_cfg.rx_flow_ctrl_thresh >= SOC_LP_UART_FIFO_LEN) || + (cfg->uart_proto_cfg.flow_ctrl >= UART_HW_FLOWCTRL_MAX) || + (cfg->uart_proto_cfg.data_bits >= UART_DATA_BITS_MAX)) { // Invalid config return ESP_ERR_INVALID_ARG; } diff --git a/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_uart.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_uart.c index 25234f94419..488ff290a05 100644 --- a/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_uart.c +++ b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_uart.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -79,6 +79,26 @@ TEST_CASE("LP-Core LP-UART initialization test", "[lp_core]") #endif /* !SOC_LP_GPIO_MATRIX_SUPPORTED */ } +TEST_CASE("LP-Core LP-UART data_bits parameter validation", "[lp_core]") +{ + /* Valid data_bits values (UART_DATA_5_BITS=0 through UART_DATA_8_BITS=3) must succeed */ + ESP_LOGI(TAG, "Verifying LP UART data_bits valid range"); + const uart_word_length_t valid_bits[] = { + UART_DATA_5_BITS, UART_DATA_6_BITS, UART_DATA_7_BITS, UART_DATA_8_BITS, + }; + for (int i = 0; i < (int)(sizeof(valid_bits) / sizeof(valid_bits[0])); i++) { + lp_core_uart_cfg_t cfg = LP_CORE_UART_DEFAULT_CONFIG(); + cfg.uart_proto_cfg.data_bits = valid_bits[i]; + TEST_ASSERT_EQUAL(ESP_OK, lp_core_uart_init(&cfg)); + } + + /* UART_DATA_BITS_MAX (=4) is not a valid word length and must be rejected */ + ESP_LOGI(TAG, "Verifying LP UART data_bits = UART_DATA_BITS_MAX is rejected"); + lp_core_uart_cfg_t cfg_max = LP_CORE_UART_DEFAULT_CONFIG(); + cfg_max.uart_proto_cfg.data_bits = UART_DATA_BITS_MAX; + TEST_ASSERT_NOT_EQUAL(ESP_OK, lp_core_uart_init(&cfg_max)); +} + /* LP UART default config */ static lp_core_uart_cfg_t lp_uart_cfg = LP_CORE_UART_DEFAULT_CONFIG();