feat(mspi): support 120MHz flash and psram for esp32c61

This commit is contained in:
Song Ruo Jing
2026-01-21 14:38:04 +08:00
parent be9b36a201
commit fc4f07abd6
40 changed files with 141 additions and 280 deletions
@@ -567,22 +567,6 @@ config SOC_MEMSPI_IS_INDEPENDENT
bool
default y
config SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
bool
default y
config SOC_SYSTIMER_COUNTER_NUM
int
default 1
@@ -258,10 +258,6 @@
// Only SPI1 supports this feature
#define SOC_MEMSPI_SUPPORT_CONTROL_DUMMY_OUT 1
#define SOC_MEMSPI_IS_INDEPENDENT 1
#define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
/*-------------------------- SYSTIMER CAPS ----------------------------------*/
#define SOC_SYSTIMER_COUNTER_NUM (1U) // Number of counter units