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Merge branch 'refactor/spi_flash_private_v5.4' into 'release/v5.4'
fix(spi_flash): fixed overboundary check skipping of erase and write_encrypted (v5.4) See merge request espressif/esp-idf!45664
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@@ -24,6 +24,12 @@ extern "C" {
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*/
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void mspi_timing_enter_low_speed_mode(bool control_spi1);
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/**
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* @brief Get PSRAM frequency in low speed mode (MHz)
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* @return PSRAM frequency in MHz when in low speed mode
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*/
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uint32_t mspi_timing_get_psram_low_speed_freq_mhz(void);
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/**
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* @brief Make MSPI work under the frequency as users set, may add certain delays to MSPI RX direction to meet timing requirements.
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* @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
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@@ -54,7 +60,6 @@ void mspi_timing_psram_tuning(void);
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*/
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void mspi_timing_set_pin_drive_strength(void);
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#ifdef __cplusplus
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}
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#endif
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