diff --git a/components/bootloader_support/src/bootloader_random_esp32s31.c b/components/bootloader_support/src/bootloader_random_esp32s31.c index eeffed49284..3b70082b018 100644 --- a/components/bootloader_support/src/bootloader_random_esp32s31.c +++ b/components/bootloader_support/src/bootloader_random_esp32s31.c @@ -5,10 +5,36 @@ */ #include "sdkconfig.h" #include "bootloader_random.h" +#include "soc/trng_reg.h" +#include "rom/ets_sys.h" +#include "rom/uart.h" + + void bootloader_random_enable(void) { + // Enable entropy source of ring + SET_PERI_REG_MASK(TRNG_CONF_REG, TRNG_SAMPLE_ENABLE); + + // Enable entropy source of crc + SET_PERI_REG_MASK(TRNG_CONF_REG, TRNG_NOISE_CRC_EN); + + // //For dieharder test + // ets_printf("S31: Random bytes (%s) follow:\n","test"); + // while (1) + // { + // uint32_t w = READ_PERI_REG(TRNG_CRC_SYNC_DATA_REG); + // // ets_printf("rng_data:%d\n", w); + // // uart_tx_wait_idle(0); + + // uart_tx_one_char(w >> 24); + // uart_tx_one_char(w >> 16); + // uart_tx_one_char(w >> 8); + // uart_tx_one_char(w); + // } } void bootloader_random_disable(void) { + CLEAR_PERI_REG_MASK(TRNG_CONF_REG, TRNG_SAMPLE_ENABLE); + CLEAR_PERI_REG_MASK(TRNG_CONF_REG, TRNG_NOISE_CRC_EN); } diff --git a/components/soc/esp32s31/register/soc/reg_base.h b/components/soc/esp32s31/register/soc/reg_base.h index b38b34f4f5c..5fef3e546e0 100644 --- a/components/soc/esp32s31/register/soc/reg_base.h +++ b/components/soc/esp32s31/register/soc/reg_base.h @@ -104,7 +104,7 @@ #define DR_REG_LP_I2C_BASE 0x20811000 #define DR_REG_LP_SPI_BASE 0x20812000 #define DR_REG_LP_I2C_ANA_MST_BASE 0x20813000 -#define DR_REG_LP_TRNG_BASE 0x20814000 +#define DR_REG_TRNG_BASE 0x20814000 #define DR_REG_ADC_BASE 0x20815000 #define DR_REG_TOUCH_SENS_BASE 0x20816000 #define DR_REG_LP_MAILBOX_BASE 0x20817000