From fa89e353bcb1186c989de63f2c7cc8652c7765c4 Mon Sep 17 00:00:00 2001
From: Alexey Lapshin <alexey.lapshin@espressif.com>
Date: Tue, 26 May 2026 18:43:23 +0700
Subject: [PATCH] feat(soc): esp32c5, esp32c61: enable zc extensions

---
 .../lowpower/port/esp32c61/sleep_cpu.c           | 16 +---------------
 .../soc/esp32c5/include/soc/Kconfig.soc_caps.in  |  4 ++++
 components/soc/esp32c5/include/soc/soc_caps.h    |  2 ++
 .../soc/esp32c61/include/soc/Kconfig.soc_caps.in |  4 ++++
 components/soc/esp32c61/include/soc/soc_caps.h   |  2 ++
 5 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/components/esp_hw_support/lowpower/port/esp32c61/sleep_cpu.c b/components/esp_hw_support/lowpower/port/esp32c61/sleep_cpu.c
index e6b8377bef1..de865ddf46d 100644
--- a/components/esp_hw_support/lowpower/port/esp32c61/sleep_cpu.c
+++ b/components/esp_hw_support/lowpower/port/esp32c61/sleep_cpu.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -70,20 +70,6 @@ FORCE_INLINE_ATTR void restore_csr_enable_global_int(uint32_t mstatus_val, uint3
 #endif
 }
 
-#if __riscv_zcmp && SOC_CPU_ZCMP_WORKAROUND
-FORCE_INLINE_ATTR uint32_t save_mintthresh_and_disable_global_int(void)
-{
-    /* Due to the reason described in IDF-14279, when mie is set to 0, mintthresh needs to be set to 0xff. */
-    // TODO: IDF-14279 DIG-661
-    return RV_READ_MINTTHRESH_AND_DISABLE_INTR();
-}
-
-FORCE_INLINE_ATTR void restore_mintthresh(uint32_t mintthresh_val)
-{
-    RV_RESTORE_MINTTHRESH(mintthresh_val);
-}
-#endif
-
 static IRAM_ATTR RvCoreNonCriticalSleepFrame * rv_core_noncritical_regs_save(void)
 {
     assert(s_cpu_retention.retent.non_critical_frame);
diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
index 3440d12e43a..9d1b4caab5b 100644
--- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
@@ -475,6 +475,10 @@ config SOC_CPU_HAS_LOCKUP_RESET
     bool
     default y
 
+config SOC_CPU_HAS_ZC_EXTENSIONS
+    bool
+    default y
+
 config SOC_CPU_ZCMP_WORKAROUND
     bool
     default y
diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h
index c90fb873eff..72cd86c4a8b 100644
--- a/components/soc/esp32c5/include/soc/soc_caps.h
+++ b/components/soc/esp32c5/include/soc/soc_caps.h
@@ -175,6 +175,8 @@
 
 #define SOC_CPU_HAS_LOCKUP_RESET        1
 
+#define SOC_CPU_HAS_ZC_EXTENSIONS       1
+
 #define SOC_CPU_ZCMP_WORKAROUND         1
 #define SOC_CPU_ZCMP_PUSH_REVERSED      1
 #define SOC_CPU_ZCMP_POPRET_ISSUE       1
diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
index 40b27626595..1d019f003a5 100644
--- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
@@ -355,6 +355,10 @@ config SOC_CPU_HAS_LOCKUP_RESET
     bool
     default y
 
+config SOC_CPU_HAS_ZC_EXTENSIONS
+    bool
+    default y
+
 config SOC_CPU_ZCMP_WORKAROUND
     bool
     default y
diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h
index afed319762f..970558e1947 100644
--- a/components/soc/esp32c61/include/soc/soc_caps.h
+++ b/components/soc/esp32c61/include/soc/soc_caps.h
@@ -138,6 +138,8 @@
 
 #define SOC_CPU_HAS_LOCKUP_RESET        1
 
+#define SOC_CPU_HAS_ZC_EXTENSIONS       1
+
 #define SOC_CPU_ZCMP_WORKAROUND         1
 #define SOC_CPU_ZCMP_PUSH_REVERSED      1
 #define SOC_CPU_ZCMP_POPRET_ISSUE       1