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dac: update unit-test docs and examples for driver-NG
This commit is contained in:
laokaiyao
298
components/driver/include/driver/dac_driver.h
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298
components/driver/include/driver/dac_driver.h
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@@ -0,0 +1,298 @@
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/*
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* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "driver/dac_types.h"
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#include "driver/gpio.h"
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if SOC_DAC_SUPPORTED
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/**
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* @brief DAC channel configuration
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*
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*/
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typedef struct {
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dac_channel_mask_t chan_sel; /*!< Using DAC channel mask to select the channels */
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} dac_channels_config_t;
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/**
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* @brief DAC continuous mode configration
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*
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*/
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typedef struct {
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uint32_t freq_hz; /*!< The frequency of DAC conversion in continuous mode, unit: Hz
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* The supported range is related to the target and the clock source.
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* For the clock `DAC_DIGI_CLK_SRC_DEFAULT`: the range is 19.6 KHz to several MHz on ESP32
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* and 77 Hz to several MHz on ESP32-S2.
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* For the clock `DAC_DIGI_CLK_SRC_APLL`: the range is 648 Hz to several MHz on ESP32
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* and 6 Hz to several MHz on ESP32-S2.
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* Typically not suggest to set the frequency higher than 2 MHz, otherwise the severe distortion will appear
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*/
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dac_conti_clk_src_t clk_src; /*!< The clock source of digital controller, which can affect the range of supported frequency
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* Currently `DAC_DIGI_CLK_SRC_DEFAULT` and `DAC_DIGI_CLK_SRC_APLL` are available
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*/
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uint32_t desc_num; /*!< The number of DMA descriptor, at least 2 descriptors are required
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* The number of descriptors is directly proportional to the max data buffer size while converting in cyclic output
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* but only need to ensure it is greater than '1' in acyclic output
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* Typically, suggest to set the number bigger than 5, in case the DMA stopped while sending a short buffer
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*/
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uint32_t buf_size; /*!< The DMA buffer size, should be within 4092 bytes. Each DMA buffer will be attached to a DMA descriptor,
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* i.e. the number of DMA buffer will be equal to the DMA descriptor number
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* The DMA buffer size is not allowed to be greater than 4092 bytes
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* The total DMA buffer size equal to `desc_num * buf_size`
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* Typically, suggest to set the size to the multiple of 4
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*/
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dac_conti_channel_mode_t chan_mode; /*!< The channel mode of continuous mode, only take effect when multiple channels enabled, depends converting the buffer alternately or simultaneously */
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} dac_conti_config_t;
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/**
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* @brief DAC cosine wave gnerator configuration
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*
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*/
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typedef struct {
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uint32_t freq_hz; /*!< The frequency of cosine wave, unit: Hz.
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* The cosine wave generator is driven by RTC clock which is about SOC_CLK_RC_FAST_FREQ_APPROX Hz by default,
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* With the default RTC clock, the minimun frequency of cosine wave is about 130 Hz,
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* Although it can support up to serveral MHz frequency theoretically,
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* the waveform will distort at high frequency due to the hardware limitation.
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* Typically not suggest to set the frequency higher than 200 KHz
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*/
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dac_cosine_clk_src_t clk_src; /*!< The clock source of the cosine wave generator, currently only support `DAC_COSINE_CLK_SRC_DEFAULT` which comes from RTC FAST clock */
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dac_cosine_scale_t scale; /*!< The scale of cosine wave amplitude */
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dac_cosine_phase_t phase; /*!< The phase of cosine wave */
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int8_t offset; /*!< The DC offset of cosine wave */
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} dac_cosine_config_t;
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typedef struct dac_channels_s *dac_channels_handle_t; /*!< DAC channels' handle of DAC peripheral, one or multiple DAC channels can be controlled by this handle */
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/*--------------------------------------------------------------------------
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DAC common APIs
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---------------------------------------------------------------------------*/
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/**
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* @brief Allocate a new DAC channels' handle
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* @note The driver supports to manage one single channel by enabling only one channel in the channel mask,
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* or multiple channels together as a whole by enabling multiple channels in the channel mask.
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* Moreover, the channels can also be managed separately if they are allocated separately.
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*
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* @param[in] dac_cfg DAC basic configuration
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* @param[out] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_NO_MEM No memory for a new DAC handle
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* - ESP_ERR_INVALID_STATE The specified DAC channel is occupied already
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* - ESP_OK Success to allocate DAC channels
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*/
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esp_err_t dac_new_channels(const dac_channels_config_t *dac_cfg, dac_channels_handle_t *handle);
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/**
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* @brief Delete and free the DAC channels
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The channels are not disabled
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* - ESP_OK Success to delete the channels
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*/
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esp_err_t dac_del_channels(dac_channels_handle_t handle);
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/**
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* @brief Enabled the DAC channels in the channels
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* @note GPIOs of DAC channles will be enabled in this step
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The channels has enabled already or the channels are running
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* - ESP_OK Success to enable the channels
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*/
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esp_err_t dac_channels_enable(dac_channels_handle_t handle);
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/**
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* @brief Disable the DAC channels in the channels
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The channels has disabled already or the channels are running
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* - ESP_OK Success to enable the channels
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*/
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esp_err_t dac_channels_disable(dac_channels_handle_t handle);
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/*--------------------------------------------------------------------------
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DAC direct voltage outputting APIs
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---------------------------------------------------------------------------*/
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/**
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* @brief DAC channels output a voltage directly
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* @note This function is available when DAC chennels is enbled
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* @note Please enable 'DAC ISR IRAM-Safe' in memuconfig when it is called in an IRAM safe ISR
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*
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* @param[in] handle DAC channels handle
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* @param[in] value The digital value of the voltage
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The channels are not enabled
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* - ESP_OK Success to enable the channels
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*/
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esp_err_t dac_channels_set_voltage(dac_channels_handle_t handle, uint8_t value);
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/*--------------------------------------------------------------------------
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DAC continuous outputting APIs
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---------------------------------------------------------------------------*/
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/**
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* @brief Initialize the DAC channels to continuous mode
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* @note DAC can convert digital data continuously in continuous mode
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*
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* @param[in] handle DAC channels handle
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* @param[in] conti_cfg DAC continuous mode configuration
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC channels has been initialized already
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* - ESP_ERR_NO_MEM No memory for DAC continuous mode
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* - ESP_OK Success to initializing the DAC channels to continuous mode
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*/
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esp_err_t dac_channels_init_continuous_mode(dac_channels_handle_t handle, const dac_conti_config_t *conti_cfg);
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/**
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* @brief Deinitialize the continuous mode of the DAC channels
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* @note It can only be deinitialized when the continuous output is disabled
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC continuous mode is not disabled yet
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* - ESP_OK Success to deinitialize the DAC continuous mode
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*/
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esp_err_t dac_channels_deinit_continuous_mode(dac_channels_handle_t handle);
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/**
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* @brief Enable the DAC continuous output
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC continuous mode has been enabled already
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* - ESP_OK Success to start the continuous output
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*/
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esp_err_t dac_channels_enable_continuous_mode(dac_channels_handle_t handle);
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/**
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* @brief Disable the DAC continuous output
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC continuous mode is disabled already
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* - ESP_OK Success to stop the continuous output
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*/
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esp_err_t dac_channels_disable_continuous_mode(dac_channels_handle_t handle);
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/**
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* @brief Write DAC continuous data continuously
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* @note The data in buffer will only be converted one time,
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* This function will be blocked until all data loaded or timeout
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* then the DAC output will keep outputting the voltage of the last data in the buffer
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* @note On ESP32, the data bit width of DAC continuous data is fixed to 16 bits while only the high 8 bits are available,
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* you can align the DAC data to 16 bits manually or set `CONFIG_DAC_DMA_AUTO_16BIT_ALIGN` to get the correct wave.
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* But the data bit width is already 8 bits on ESP32-S2, each byte stands for an vailable voltage,
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* no need to do any alignment.
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*
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* @param[in] handle DAC channels handle
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* @param[in] buf The digital data buffer to convert
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* @param[in] buf_size The buffer size of digital data buffer
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* @param[out] bytes_loaded The bytes that has been loaded into DMA buffer, can be NULL if don't need it
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* @param[in] timeout_ms The timeout time in mili-second
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC continuous mode has not been enabled yet
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* - ESP_ERR_TIMEOUT Waiting for semaphore or message queue timeout
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* - ESP_OK Success to output the acyclic DAC data
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*/
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esp_err_t dac_channels_write_continuously(dac_channels_handle_t handle, uint8_t *buf, size_t buf_size, size_t *bytes_loaded, uint32_t timeout_ms);
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/**
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* @brief Write DAC continuous data cyclically
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* @note The data in buffer will be converted cyclically once this function is called,
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* This function won't be blocked, it will return once the data loaded into DMA buffers
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* @note The buffer size of cyclically output is limited by the descriptor number while initializing the continuous mode,
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* Concretely, in order to load all the data into descriptors,
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* the cyclic buffer size is not supposed to be greater than `desc_num * 4092`
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* @note On ESP32, the data bit width of DAC continuous data is fixed to 16 bits while only the high 8 bits are available,
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* you can align the DAC data to 16 bits manually or set `CONFIG_DAC_DMA_AUTO_16BIT_ALIGN` to get the correct wave.
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* But the data bit width is already 8 bits on ESP32-S2, each byte stands for an vailable voltage,
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* no need to do any alignment.
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*
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* @param[in] handle DAC channels handle
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* @param[in] buf The digital data buffer to convert
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* @param[in] buf_size The buffer size of digital data buffer
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* @param[out] bytes_loaded The bytes that has been loaded into DMA buffer, can be NULL if don't need it
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* @param[in] timeout_ms The timeout time in mili-second
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC continuous mode has not been enabled yet
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* - ESP_ERR_TIMEOUT Waiting for semaphore or message queue timeout
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* - ESP_OK Success to output the acyclic DAC data
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*/
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esp_err_t dac_channels_write_cyclically(dac_channels_handle_t handle, uint8_t *buf, size_t buf_size, size_t *bytes_loaded, uint32_t timeout_ms);
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/*--------------------------------------------------------------------------
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DAC cosine wave outputting APIs
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---------------------------------------------------------------------------*/
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/**
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* @brief Initialize the DAC channels to cosine wave mode
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*
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* @param[in] handle DAC channels handle
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* @param[in] cw_cfg DAC cosine wave generater configuration
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC channels has been initialized already
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* - ESP_OK Success to initialize the DAC channels into cosine wave mode
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*/
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esp_err_t dac_channels_init_cosine_mode(dac_channels_handle_t handle, const dac_cosine_config_t *cw_cfg);
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/**
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* @brief Deinitialize the DAC channels to cosine wave mode
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC cosine wave generator is not stopped yet
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* - ESP_OK Success to deinitialize the DAC cosine mode
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*/
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esp_err_t dac_channels_deinit_cosine_mode(dac_channels_handle_t handle);
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/**
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* @brief Start the DAC cosine wave generator output
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC channels has not been enabled yet or started already
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* - ESP_OK Success to start cosine wave generator
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*/
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esp_err_t dac_channels_start_cosine_output(dac_channels_handle_t handle);
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/**
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* @brief Stop the DAC cosine wave generator output
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*
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* @param[in] handle DAC channels handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The DAC channels has not been enabled yet or stoppped already
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* - ESP_OK Success to stop cosine wave generator
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*/
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esp_err_t dac_channels_stop_cosine_output(dac_channels_handle_t handle);
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#endif // SOC_DAC_SUPPORTED
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#ifdef __cplusplus
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}
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#endif
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@@ -1,260 +0,0 @@
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/*
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* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "driver/dac_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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#define DAC_CHANNEL1_IO 25 /*!< ESP32 DAC channel 1 GPIO number: GPIO_NUM_25 */
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#define DAC_CHANNEL2_IO 26 /*!< ESP32 DAC channel 2 GPIO number: GPIO_NUM_26 */
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define DAC_CHANNEL1_IO 17 /*!< ESP32S2 DAC channel 1 GPIO number: GPIO_NUM_17 */
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#define DAC_CHANNEL2_IO 18 /*!< ESP32S2 DAC channel 2 GPIO number: GPIO_NUM_17 */
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#endif
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/**
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* @brief DAC channel configuration
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*
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*/
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typedef struct {
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dac_channel_mask_t chan_sel; /*!< Using DAC channel mask to select the channel in the channel group */
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} dac_group_config_t;
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/**
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* @brief DAC DMA configration
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*
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*/
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typedef struct {
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uint32_t freq_hz; /*!< The frequency of DAC converting each data in DMA mode, unit: Hz */
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uint32_t desc_num; /*!< The number of DMA descriptor , directly proportional to the max data buffer size while converting in cyclic way */
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dac_dma_channel_mode_t chan_mode; /*!< DMA channel mode, only take effect when multiple channels enabled in a group, depends converting the buffer alternately or simultaneously */
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} dac_dma_config_t;
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/**
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* @brief DAC cosine wave gnerator configuration
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*
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*/
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typedef struct {
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uint32_t freq_hz; /*!< The frequency of cosine wave, unit: Hz */
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dac_cosine_scale_t scale; /*!< The scale of cosine wave amplitude */
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dac_cosine_phase_t phase; /*!< The phase of cosine wave */
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int8_t offset; /*!< The DC offset of cosine wave */
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} dac_cosine_config_t;
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typedef struct dac_channel_group_s *dac_channel_group_handle_t; /*!< DAC group handle of DAC peripheral, one or multiple DAC channels can be controlled by the group handle */
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/*--------------------------------------------------------------------------
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DAC common APIs
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---------------------------------------------------------------------------*/
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/**
|
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* @brief Allocate a new DAC channel group
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*
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* @param[in] dac_cfg DAC basic configuration
|
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* @param[out] handle DAC channel group handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_NO_MEM No memory for a new DAC handle
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* - ESP_ERR_INVALID_STATE The specified DAC channel is occupied already
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* - ESP_OK Success to allocate DAC channel group
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*/
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esp_err_t dac_new_channel_group(const dac_group_config_t *dac_cfg, dac_channel_group_handle_t *handle);
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/**
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* @brief Delete and free the DAC channel group
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*
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* @param[in] handle DAC channel group handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The channel group is not disabled
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* - ESP_OK Success to delete the channel group
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*/
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esp_err_t dac_del_channel_group(dac_channel_group_handle_t handle);
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/**
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* @brief Enabled the DAC channels in the channel group
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* @note GPIOs of DAC channles will be enabled in this step
|
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*
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* @param[in] handle DAC channel group handle
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* @return
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||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The channel group has enabled already or the channels are running
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* - ESP_OK Success to enable the channel group
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*/
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esp_err_t dac_channel_group_enable(dac_channel_group_handle_t handle);
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/**
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* @brief Disable the DAC channels in the channel group
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*
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* @param[in] handle DAC channel group handle
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* @return
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* - ESP_ERR_INVALID_ARG The input parameter is invalid
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* - ESP_ERR_INVALID_STATE The channel group has disabled already or the channels are running
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* - ESP_OK Success to enable the channel group
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*/
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esp_err_t dac_channel_group_disable(dac_channel_group_handle_t handle);
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/*--------------------------------------------------------------------------
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DAC constant voltage outputting APIs
|
||||
---------------------------------------------------------------------------*/
|
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/**
|
||||
* @brief DAC channel group output a constant voltage
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||||
* @note This function is available when DAC chennel group is enbled
|
||||
*
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||||
* @param[in] handle DAC channel group handle
|
||||
* @param[in] value The digital value of the constant voltage
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||||
* @return
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||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The channel group is not enabled
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||||
* - ESP_OK Success to enable the channel group
|
||||
*/
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esp_err_t dac_channel_group_output_constant_voltage(dac_channel_group_handle_t handle, uint8_t value);
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/*--------------------------------------------------------------------------
|
||||
DAC continuous outputting APIs
|
||||
---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Initialize the DAC channel group to DMA mode
|
||||
* @note DAC can convert digital data continuously in DMA mode
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @param[in] dma_cfg DAC DMA configuration
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC channel group has been initialized already
|
||||
* - ESP_ERR_NO_MEM No memory for DAC DMA mode
|
||||
* - ESP_OK Success to initializing the DAC channel group to DMA mode
|
||||
*/
|
||||
esp_err_t dac_channel_group_init_dma_output(dac_channel_group_handle_t handle, const dac_dma_config_t *dma_cfg);
|
||||
|
||||
/**
|
||||
* @brief Deinitialize the DMA mode of the DAC channel group
|
||||
* @note It can only be deinitialized when the DMA output is stopped
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC DMA is not stopped yet
|
||||
* - ESP_OK Success to deinitialize the DAC DMA mode
|
||||
*/
|
||||
esp_err_t dac_channel_group_deinit_dma_output(dac_channel_group_handle_t handle);
|
||||
|
||||
/**
|
||||
* @brief Start the DAC DMA output
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC DMA has not been enabled yet or started already
|
||||
* - ESP_OK Success to start the DMA output
|
||||
*/
|
||||
esp_err_t dac_channel_group_start_dma_output(dac_channel_group_handle_t handle);
|
||||
|
||||
/**
|
||||
* @brief Stop the DAC DMA output
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC DMA is stopped or not disabled already
|
||||
* - ESP_OK Success to stop the DMA output
|
||||
*/
|
||||
esp_err_t dac_channel_group_stop_dma_output(dac_channel_group_handle_t handle);
|
||||
|
||||
/**
|
||||
* @brief Write DAC DMA data acyclicly
|
||||
* @note The data in buffer will only be converted one time,
|
||||
* This function will be blocked until all data sent successfully or timeout
|
||||
* then the DAC output will keep outputting the voltage of the last data in the buffer
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @param[in] buf The digital data buffer to convert
|
||||
* @param[in] buf_size The buffer size of digital data buffer
|
||||
* @param[in] timeout_ms The timeout time in mili-second
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC DMA has not been started or enabled yet
|
||||
* - ESP_ERR_TIMEOUT Waiting for semaphore or message queue timeout
|
||||
* - ESP_OK Success to output the acyclic DAC data by DMA
|
||||
*/
|
||||
esp_err_t dac_channel_group_write_acyclicly(dac_channel_group_handle_t handle, uint8_t *buf, size_t buf_size, uint32_t timeout_ms);
|
||||
|
||||
/**
|
||||
* @brief Write DAC DMA data cyclicly
|
||||
* @note The data in buffer will be converted cyclicly once this function is called,
|
||||
* so the input buffer needs to stay accessable during the convertion,
|
||||
* but this function won't be blocked, it will return once the data loaded into DMA descriptors
|
||||
* @note The buffer size of cyclicly output is limited by the descriptor number while initializing the DMA mode,
|
||||
* Concretely, in order to load all the data into descriptors,
|
||||
* the cyclic buffer size is not supposed to be greater than `desc_num * 4092`
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @param[in] buf The digital data buffer to convert
|
||||
* @param[in] buf_size The buffer size of digital data buffer
|
||||
* @param[in] timeout_ms The timeout time in mili-second
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC DMA has not been started or enabled yet
|
||||
* - ESP_ERR_TIMEOUT Waiting for semaphore or message queue timeout
|
||||
* - ESP_OK Success to output the acyclic DAC data by DMA
|
||||
*/
|
||||
esp_err_t dac_channel_group_write_cyclicly(dac_channel_group_handle_t handle, uint8_t *buf, size_t buf_size, uint32_t timeout_ms);
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
DAC cosine wave outputting APIs
|
||||
---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Initialize the DAC channel group to cosine wave mode
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @param[in] cw_cfg DAC cosine wave generater configuration
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC channel group has been initialized already
|
||||
* - ESP_OK Success to initialize the DAC channel group into cosine wave mode
|
||||
*/
|
||||
esp_err_t dac_channel_group_init_cosine_output(dac_channel_group_handle_t handle, const dac_cosine_config_t *cw_cfg);
|
||||
|
||||
/**
|
||||
* @brief Deinitialize the DAC channel group to cosine wave mode
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC cosine wave generator is not stopped yet
|
||||
* - ESP_OK Success to deinitialize the DAC DMA mode
|
||||
*/
|
||||
esp_err_t dac_channel_group_deinit_cosine_output(dac_channel_group_handle_t handle);
|
||||
|
||||
/**
|
||||
* @brief Start the DAC cosine wave generator output
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC channel group has not been enabled yet or started already
|
||||
* - ESP_OK Success to start cosine wave generator
|
||||
*/
|
||||
esp_err_t dac_channel_group_start_cosine_output(dac_channel_group_handle_t handle);
|
||||
|
||||
/**
|
||||
* @brief Stop the DAC cosine wave generator output
|
||||
*
|
||||
* @param[in] handle DAC channel group handle
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG The input parameter is invalid
|
||||
* - ESP_ERR_INVALID_STATE The DAC channel group has not been enabled yet or stoppped already
|
||||
* - ESP_OK Success to stop cosine wave generator
|
||||
*/
|
||||
esp_err_t dac_channel_group_stop_cosine_output(dac_channel_group_handle_t handle);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -5,51 +5,82 @@
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h>
|
||||
#include "soc/soc_caps.h"
|
||||
#include "soc/clk_tree_defs.h"
|
||||
#include "hal/adc_types.h"
|
||||
#include "esp_bit_defs.h"
|
||||
#include "sdkconfig.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if SOC_DAC_SUPPORTED
|
||||
|
||||
/**
|
||||
* @brief DAC channel mask
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
DAC_CHANNEL_MASK_1 = BIT(0), /*!< DAC channel 1 is GPIO25(ESP32) / GPIO17(ESP32S2) */
|
||||
DAC_CHANNEL_MASK_2 = BIT(1), /*!< DAC channel 2 is GPIO26(ESP32) / GPIO18(ESP32S2) */
|
||||
DAC_CHANNEL_MASK_BOTH = BIT(0) | BIT(1), /*!< DAC channel 2 is GPIO26(ESP32) / GPIO18(ESP32S2) */
|
||||
DAC_CHANNEL_MASK_CH0 = BIT(0), /*!< DAC channel 0 is GPIO25(ESP32) / GPIO17(ESP32S2) */
|
||||
DAC_CHANNEL_MASK_CH1 = BIT(1), /*!< DAC channel 1 is GPIO26(ESP32) / GPIO18(ESP32S2) */
|
||||
DAC_CHANNEL_MASK_BOTH = BIT(0) | BIT(1), /*!< Both DAC channel 0 and channel 1 */
|
||||
} dac_channel_mask_t;
|
||||
|
||||
/**
|
||||
* @brief DAC channel work mode in dma mode
|
||||
* @note Only take effect when multiple channels enabled.
|
||||
* @note Assume the data in buffer is 'A B C D E F'
|
||||
* DAC_CHANNEL_MODE_SIMUL:
|
||||
* - channel 0: A B C D E F
|
||||
* - channel 1: A B C D E F
|
||||
* DAC_CHANNEL_MODE_ALTER:
|
||||
* - channel 0: A C E
|
||||
* - channel 1: B D F
|
||||
*/
|
||||
typedef enum {
|
||||
DAC_CHANNEL_SIMULTANEOUS, /*!< The data in the DMA buffer is simultaneously output to the enable channel of the DAC. */
|
||||
DAC_CHANNEL_ALTERNATE, /*!< The data in the DMA buffer is alternately output to the enable channel of the DAC. */
|
||||
} dac_dma_channel_mode_t;
|
||||
DAC_CHANNEL_MODE_SIMUL, /*!< The data in the DMA buffer is simultaneously output to the enable channel of the DAC. */
|
||||
DAC_CHANNEL_MODE_ALTER, /*!< The data in the DMA buffer is alternately output to the enable channel of the DAC. */
|
||||
} dac_conti_channel_mode_t;
|
||||
|
||||
/**
|
||||
* @brief The multiple of the amplitude of the cosine wave generator. The max amplitude is VDD3P3_RTC.
|
||||
* @brief DAC DMA (digitial controller) clock source
|
||||
*
|
||||
*/
|
||||
typedef soc_periph_dac_digi_clk_src_t dac_conti_clk_src_t;
|
||||
|
||||
/**
|
||||
* @brief DAC cosine wave generator clock source
|
||||
*
|
||||
*/
|
||||
typedef soc_periph_dac_cosine_clk_src_t dac_cosine_clk_src_t;
|
||||
|
||||
/**
|
||||
* @brief The attenuation of the amplitude of the cosine wave generator. The max amplitude is VDD3P3_RTC.
|
||||
*/
|
||||
typedef enum {
|
||||
DAC_COSINE_SCALE_1 = 0x0, /*!< No scaling to the DAC cosine wave amplitude. Default. */
|
||||
DAC_COSINE_SCALE_2 = 0x1, /*!< 1/2 amplitude of the DAC cosine wave */
|
||||
DAC_COSINE_SCALE_4 = 0x2, /*!< 1/4 amplitude of the DAC cosine wave */
|
||||
DAC_COSINE_SCALE_8 = 0x3, /*!< 1/8 amplitude of the DAC cosine wave */
|
||||
DAC_COSINE_NO_ATTEN = 0x0, /*!< No attenuation to the DAC cosine wave amplitude. Default. */
|
||||
DAC_COSINE_ATTEN_2 = 0x1, /*!< 1/2 amplitude of the DAC cosine wave */
|
||||
DAC_COSINE_ATTEN_4 = 0x2, /*!< 1/4 amplitude of the DAC cosine wave */
|
||||
DAC_COSINE_ATTEN_8 = 0x3, /*!< 1/8 amplitude of the DAC cosine wave */
|
||||
} dac_cosine_scale_t;
|
||||
|
||||
/**
|
||||
* @brief Set the phase of the cosine wave generator output.
|
||||
* @note Only 0 or 180 are supported,
|
||||
* it will be set to 0 as default if configured to an unsupported phase.
|
||||
*/
|
||||
typedef enum {
|
||||
DAC_COSINE_PHASE_0 = 0x2, /*!< Phase shift +0° */
|
||||
DAC_COSINE_PHASE_180 = 0x3, /*!< Phase shift +180° */
|
||||
DAC_COSINE_PHASE_0 = 0, /*!< Phase shift +0° */
|
||||
DAC_COSINE_PHASE_180 = 180, /*!< Phase shift +180° */
|
||||
} dac_cosine_phase_t;
|
||||
|
||||
#endif // SOC_DAC_SUPPORTED
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -1,37 +0,0 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "esp_err.h"
|
||||
#include "esp_intr_alloc.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
esp_err_t dac_dma_periph_init(int chan_num, uint32_t freq_hz, bool is_alternate);
|
||||
|
||||
esp_err_t dac_dma_periph_deinit(void);
|
||||
|
||||
esp_err_t dac_dma_periph_register_intr(intr_handler_t intr_handler_func, void *user_ctx);
|
||||
|
||||
esp_err_t dac_dma_periph_deregister_intr(void);
|
||||
|
||||
void dac_dma_periph_enable(void);
|
||||
|
||||
void dac_dma_periph_disable(void);
|
||||
|
||||
bool dac_dma_periph_intr_is_triggered(void);
|
||||
|
||||
uint32_t dac_dma_periph_intr_get_eof_desc(void);
|
||||
|
||||
void dac_dma_periph_dma_trans_start(uint32_t desc_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user