Merge branch 'bugfix/enable_misc_test_case_v5.4' into 'release/v5.4'

ci: cleanup misc system build-test-rules (v5.4)

See merge request espressif/esp-idf!41318

components/bootloader_support/test_apps/.build-test-rules.yml

@@ -4,7 +4,3 @@ components/bootloader_support/test_apps/rtc_custom_section:
   enable:
     - if: SOC_RTC_MEM_SUPPORTED == 1
       reason: this feature is supported on chips that have RTC memory
-  disable:
-    - if: IDF_TARGET == "esp32c61"
-      temporary: true
-      reason: IDF-9260

components/efuse/test_apps/.build-test-rules.yml

@@ -5,5 +5,4 @@ components/efuse/test_apps:
     - if: (INCLUDE_DEFAULT == 1 and SOC_EFUSE_SUPPORTED == 1) or IDF_TARGET == "linux")
   disable_test:
     - if: IDF_TARGET in ["esp32s2", "esp32s3"]
-      temporary: true
       reason: eFuse for S2 and S3 is similar to the C3 chip, so we only test for C3.

components/freertos/test_apps/.build-test-rules.yml

@@ -5,10 +5,6 @@ components/freertos/test_apps/freertos:
     - if: CONFIG_NAME == "smp" and IDF_TARGET == "esp32p4"
       temporary: true
       reason: target(s) not supported yet
-  disable_test:
-    - if: CONFIG_NAME == "smp" and IDF_TARGET == "esp32c5"
-      temporary: true
-      reason: target test failed # TODO: [ESP32C5] IDF-10335
 
 components/freertos/test_apps/orig_inc_path:
   enable: