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fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access

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This commit is contained in:
Song Ruo Jing
2025-05-20 15:30:26 +08:00
parent 6cffc5c994
commit f61b453a25
17 changed files with 73 additions and 59 deletions
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components/soc/esp32c2/register/soc/gpio_struct.h
+2 -2
View File
@@ -301,7 +301,7 @@ typedef union {
* set this value: s=0-53: connect GPIO[s] to this port. s=0x38: set this port always
* high level. s=0x3C: set this port always low level.
*/
uint32_t func_sel:5;
uint32_t in_sel:5;
/** in_inv_sel : R/W; bitpos: [5]; default: 0;
* set this bit to invert input signal. 1:invert. 0:not invert.
*/
@@ -325,7 +325,7 @@ typedef union {
* output of GPIO[n] equals input of peripheral[s]. s=256: output of GPIO[n] equals
* GPIO_OUT_REG[n].
*/
uint32_t func_sel:8;
uint32_t out_sel:8;
/** out_inv_sel : R/W; bitpos: [8]; default: 0;
* set this bit to invert output signal.1:invert.0:not invert.
*/
components/soc/esp32c3/register/soc/gpio_struct.h
+2 -2
View File
@@ -182,7 +182,7 @@ typedef volatile struct gpio_dev_s {
uint32_t reserved_150;
union {
struct {
uint32_t func_sel: 5;
uint32_t in_sel: 5;
uint32_t sig_in_inv: 1;
uint32_t sig_in_sel: 1;
uint32_t reserved7: 25;
@@ -319,7 +319,7 @@ typedef volatile struct gpio_dev_s {
uint32_t reserved_550;
union {
struct {
uint32_t func_sel: 8;
uint32_t out_sel: 8;
uint32_t inv_sel: 1;
uint32_t oen_sel: 1;
uint32_t oen_inv_sel: 1;
components/soc/esp32c5/register/soc/lp_gpio_struct.h
+12 -12
View File
@@ -33,7 +33,7 @@ typedef union {
*/
typedef union {
struct {
/** out_w1ts : WT; bitpos: [7:0]; default: 0;
/** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
* Configures whether or not to enable the output register LP_IO_OUT_REG of GPIO0 ~
* GPIO7.\\
*
@@ -42,7 +42,7 @@ typedef union {
* will be set to 1.
* - Recommended operation: use this register to set LP_IO_OUT_REG.
*/
uint32_t out_w1ts:8;
uint32_t out_data_w1ts:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -53,7 +53,7 @@ typedef union {
*/
typedef union {
struct {
/** out_w1tc : WT; bitpos: [7:0]; default: 0;
/** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
* Configures whether or not to clear the output register LP_IO_OUT_REG of GPIO0 ~
* GPIO7.\\
*
@@ -62,7 +62,7 @@ typedef union {
* will be cleared.
* - Recommended operation: use this register to clear LP_IO_OUT_REG.
*/
uint32_t out_w1tc:8;
uint32_t out_data_w1tc:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -90,7 +90,7 @@ typedef union {
*/
typedef union {
struct {
/** enable_w1ts : WT; bitpos: [7:0]; default: 0;
/** out_enable_w1ts : WT; bitpos: [7:0]; default: 0;
* Configures whether or not to set the output enable register LP_IO_ENABLE_REG of
* GPIO0 ~ GPIO7.\\
*
@@ -99,7 +99,7 @@ typedef union {
* LP_IO_ENABLE_REG will be set to 1.
* - Recommended operation: use this register to set LP_IO_ENABLE_REG.
*/
uint32_t enable_w1ts:8;
uint32_t out_enable_w1ts:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -110,7 +110,7 @@ typedef union {
*/
typedef union {
struct {
/** enable_w1tc : WT; bitpos: [7:0]; default: 0;
/** out_enable_w1tc : WT; bitpos: [7:0]; default: 0;
* Configures whether or not to clear the output enable register LP_IO_ENABLE_REG of
* GPIO0 ~ GPIO7.\\
*
@@ -119,7 +119,7 @@ typedef union {
* LP_IO_ENABLE_REG will be cleared.
* - Recommended operation: use this register to clear LP_IO_ENABLE_REG.
*/
uint32_t enable_w1tc:8;
uint32_t out_enable_w1tc:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -165,7 +165,7 @@ typedef union {
*/
typedef union {
struct {
/** status_w1ts : WT; bitpos: [7:0]; default: 0;
/** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
* Configures whether or not to set the interrupt status register LP_IO_STATUS_INT of
* GPIO0 ~ GPIO7.\\
*
@@ -174,7 +174,7 @@ typedef union {
* LP_IO_STATUS_INT will be set to 1.
* - Recommended operation: use this register to set LP_IO_STATUS_INT.
*/
uint32_t status_w1ts:8;
uint32_t status_intr_w1ts:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -185,7 +185,7 @@ typedef union {
*/
typedef union {
struct {
/** status_w1tc : WT; bitpos: [7:0]; default: 0;
/** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
* Configures whether or not to clear the interrupt status register LP_IO_STATUS_INT
* of GPIO0 ~ GPIO7. \\
*
@@ -194,7 +194,7 @@ typedef union {
* LP_IO_STATUS_INT will be cleared
* - ecommended operation: use this register to clear LP_IO_STATUS_INT.
*/
uint32_t status_w1tc:8;
uint32_t status_intr_w1tc:8;
uint32_t reserved_8:24;
};
uint32_t val;
components/soc/esp32c6/register/soc/lp_io_struct.h
+9 -9
View File
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -30,10 +30,10 @@ typedef union {
*/
typedef union {
struct {
/** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
/** out_w1ts : WT; bitpos: [7:0]; default: 0;
* set one time output data
*/
uint32_t out_data_w1ts:8;
uint32_t out_w1ts:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -44,10 +44,10 @@ typedef union {
*/
typedef union {
struct {
/** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
/** out_w1tc : WT; bitpos: [7:0]; default: 0;
* clear one time output data
*/
uint32_t out_data_w1tc:8;
uint32_t out_w1tc:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -114,10 +114,10 @@ typedef union {
*/
typedef union {
struct {
/** status_w1ts : WT; bitpos: [7:0]; default: 0;
/** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
* set one time output data
*/
uint32_t status_w1ts:8;
uint32_t status_intr_w1ts:8;
uint32_t reserved_8:24;
};
uint32_t val;
@@ -128,10 +128,10 @@ typedef union {
*/
typedef union {
struct {
/** status_w1tc : WT; bitpos: [7:0]; default: 0;
/** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
* clear one time output data
*/
uint32_t status_w1tc:8;
uint32_t status_intr_w1tc:8;
uint32_t reserved_8:24;
};
uint32_t val;