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fix(gdma): treat burst size 0 and 1 as burst disabled
The GDMA layer used `max_data_burst_size == 0` as the only way to disable the data burst. That conflicts with the upstream drivers' convention where a zeroed config struct means "unset", so users had no way to ask for the driver default burst size. GDMA now treats both 0 and 1 as "no data burst": a single-beat burst has no benefit over the non-burst mode. The MSPI alignment constraint under Flash Encryption / PSRAM ECC still takes precedence and is reported with a warning. The upstream drivers using GDMA now apply their own default burst size (16 bytes) when the user leaves `dma_burst_size` as 0, following the UHCI driver: - esp_async_crc (AHB / AXI GDMA backend) - esp_async_memcpy (AHB / AXI / LP-AHB / DW_GDMA backend) Callers that really want no burst can now set `dma_burst_size` to 1.
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@@ -29,7 +29,7 @@ typedef struct {
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gpio_num_t data_gpio_nums[ESP_LCD_I80_BUS_WIDTH_MAX]; /*!< GPIOs used for data lines */
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size_t bus_width; /*!< Number of data lines, 8 or 16 */
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size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
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size_t dma_burst_size; /*!< DMA burst size, in bytes */
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size_t dma_burst_size; /*!< DMA burst size, in bytes, must be a power of 2. Set to 0 to use the driver default. Set to 1 to disable the data burst. */
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/// Extra configuration flags for I80 bus
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struct extra_i80_bus_flags {
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uint32_t allow_pd: 1; /*!< If set, driver allows the power domain to be powered off when system enters sleep mode.
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@@ -30,7 +30,7 @@ typedef struct {
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uint32_t pclk_hz; /*!< Frequency of pixel clock */
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parlio_clock_source_t clk_src; /*!< Clock source for the Parlio peripheral */
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size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
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size_t dma_burst_size; /*!< DMA burst size, in bytes */
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size_t dma_burst_size; /*!< DMA burst size, in bytes, must be a power of 2. Set to 0 to use the driver default. Set to 1 to disable the data burst. */
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size_t trans_queue_depth; /*!< Transaction queue size, larger queue, higher throughput */
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int lcd_cmd_bits; /*!< Bit-width of LCD command */
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int lcd_param_bits; /*!< Bit-width of LCD parameter */
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