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fix(gdma): treat burst size 0 and 1 as burst disabled
The GDMA layer used `max_data_burst_size == 0` as the only way to disable the data burst. That conflicts with the upstream drivers' convention where a zeroed config struct means "unset", so users had no way to ask for the driver default burst size. GDMA now treats both 0 and 1 as "no data burst": a single-beat burst has no benefit over the non-burst mode. The MSPI alignment constraint under Flash Encryption / PSRAM ECC still takes precedence and is reported with a warning. The upstream drivers using GDMA now apply their own default burst size (16 bytes) when the user leaves `dma_burst_size` as 0, following the UHCI driver: - esp_async_crc (AHB / AXI GDMA backend) - esp_async_memcpy (AHB / AXI / LP-AHB / DW_GDMA backend) Callers that really want no burst can now set `dma_burst_size` to 1.
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@@ -43,7 +43,7 @@ typedef struct {
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*
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* @param[in] asrc_idx ASRC hardware index
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* @param[in] user_data User context passed to GDMA callbacks
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* @param[in] max_data_burst_size Maximum data burst size
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* @param[in] max_data_burst_size Maximum data burst size. Set to 0 to use the adapter default. Set to 1 to disable the data burst.
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* @param[out] dma_tx_chan Returned GDMA TX channel handle
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* @param[out] dma_rx_chan Returned GDMA RX channel handle
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*
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