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Merge branch 'bugfix/esp32c5_encrypted_flash_write_v6.0' into 'release/v6.0'

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fix(spi_flash): Add CPU frequency switching during flash encrypted write (v6.0)

See merge request espressif/esp-idf!44304
This commit is contained in:
Jiang Jiang Jian
2025-12-21 15:28:33 +08:00
parent 8c379b517f 469953bd04
commit f409428bf3
49 changed files with 2110 additions and 95 deletions
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components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
+4
View File
@@ -675,6 +675,10 @@ config SOC_SPI_MEM_SUPPORT_WRAP
bool
default y
config SOC_SPI_MEM_PSRAM_FREQ_AXI_CONSTRAINED
bool
default y
config SOC_SYSTIMER_COUNTER_NUM
int
default 2
components/soc/esp32h4/include/soc/soc_caps.h
+1
View File
@@ -384,6 +384,7 @@
#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1)
#define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1)
#define SOC_SPI_MEM_SUPPORT_WRAP (1)
#define SOC_SPI_MEM_PSRAM_FREQ_AXI_CONSTRAINED (1)
/*-------------------------- SYSTIMER CAPS ----------------------------------*/
#define SOC_SYSTIMER_COUNTER_NUM 2 // Number of counter units