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feat(sdmmc): add esp32s31 support

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Enable SDMMC host support on ESP32-S31 across HAL, SOC caps, tests, examples, and documentation.
This commit is contained in:
armando
2026-05-21 09:09:28 +08:00
parent 19a716086f
commit f408e1a8bc
38 changed files with 1813 additions and 218 deletions
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components/esp_hal_sd/esp32s3/include/hal/sdmmc_ll.h
+81 -1
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -89,6 +89,8 @@ extern "C" {
#define SDMMC_LL_DELAY_MAX_NUMS_LS 4
#define SDMMC_LL_DELAY_PHASE_SUPPORTED 1
#define SDMMC_LL_DEFAULT_DIV 2
/**
* SDMMC delay phase
*/
@@ -107,6 +109,20 @@ typedef enum {
SDMMC_LL_SPEED_MODE_HS,
} sdmmc_ll_speed_mode_t;
/**
* SDMMC memory low power mode
*/
typedef enum {
SDMMC_LL_MEM_LP_MODE_SHUT_DOWN,
} sdmmc_ll_mem_lp_mode_t;
/**
* @brief SDMMC IO power control source
*/
typedef enum {
SDMMC_LL_IO_POWER_CONTROL_SRC_INTERNAL,
} sdmmc_ll_io_power_control_src_t;
/*---------------------------------------------------------------
Clock & Reset
---------------------------------------------------------------*/
@@ -148,6 +164,60 @@ static inline void sdmmc_ll_reset_register(int group_id)
sdmmc_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
* @brief Force power on the SDMMC memory block, regardless of the outside PMU logic
*
* @param dev Peripheral instance address
*/
static inline void sdmmc_ll_mem_force_power_on(sdmmc_dev_t *dev)
{
(void)dev;
}
/**
* @brief Force the SDMMC memory block into low power mode, regardless of the outside PMU logic
*
* @param dev Peripheral instance address
*/
static inline void sdmmc_ll_mem_force_low_power(sdmmc_dev_t *dev)
{
(void)dev;
}
/**
* @brief Power control the SDMMC memory block by the outside PMU logic
*
* @param dev Peripheral instance address
*/
static inline void sdmmc_ll_mem_power_by_pmu(sdmmc_dev_t *dev)
{
(void)dev;
}
/**
* @brief Set low power mode for SDMMC memory block
*
* @param dev Peripheral instance address
* @param mode SDMMC memory low power mode in low power stage
*/
static inline void sdmmc_ll_mem_set_low_power_mode(sdmmc_dev_t *dev, sdmmc_ll_mem_lp_mode_t mode)
{
(void)dev;
(void)mode;
}
/**
* @brief Set SDMMC pad pin dedicated ctrl
*
* @param dev Peripheral instance address
* @param enable True to enable, False to disable
*/
static inline void sdmmc_ll_pad_set_pin_dedicated_ctrl(sdmmc_dev_t *dev, bool enable)
{
(void)dev;
(void)enable;
}
/**
* @brief Select SDMMC clock source
*
@@ -797,6 +867,16 @@ static inline void sdmmc_ll_clear_idsts_interrupt(sdmmc_dev_t *hw, uint32_t mask
hw->idsts.val = mask;
}
/**
* @brief Switch SDMMC IO power control source
*
* @param src SDMMC IO power control source
*/
static inline void sdmmc_ll_switch_io_power_control_src(sdmmc_ll_io_power_control_src_t src)
{
//for compatibility
}
#ifdef __cplusplus
}
#endif