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clk_tree: added default clock source for peripheral

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morris
2022-04-14 15:44:56 +08:00
parent 11abb67e65
commit f32a89826c
61 changed files with 578 additions and 215 deletions
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components/esp_lcd/test_apps/rgb_lcd/main/test_rgb_panel.c
+1 -1
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@@ -29,7 +29,7 @@ static esp_lcd_panel_handle_t test_rgb_panel_initialization(bool stream_mode, es
esp_lcd_rgb_panel_config_t panel_config = {
.data_width = 16,
.psram_trans_align = 64,
.clk_src = LCD_CLK_SRC_PLL160M,
.clk_src = LCD_CLK_SRC_DEFAULT,
.disp_gpio_num = TEST_LCD_DISP_EN_GPIO,
.pclk_gpio_num = TEST_LCD_PCLK_GPIO,
.vsync_gpio_num = TEST_LCD_VSYNC_GPIO,