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Merge branch 'release/v6.0' into 'feat/mcpwm_support_h4_v6.0'
# Conflicts: # docs/docs_not_updated/esp32h4.txt
This commit is contained in:
@@ -1,44 +0,0 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/etm_periph.h"
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#include "soc/soc_etm_reg.h"
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/**
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* ETM Registers to be saved during sleep retention
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* - Channel configuration registers, e.g.: SOC_ETM_CH0_EVT_ID_REG, SOC_ETM_CH0_TASK_ID_REG
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*/
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#define ETM_RETENTION_REGS_CNT ((SOC_ETM_CH49_TASK_ID_REG - SOC_ETM_CH0_EVT_ID_REG) / 4 + 1)
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static const regdma_entries_config_t etm_regdma_entries[] = {
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// backup stage: save the status of enabled channels
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// restore stage: store the enabled channels
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[0] = {
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.config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_ETM_LINK(0x00),
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SOC_ETM_CH_ENA_AD0_REG, SOC_ETM_CH_ENA_AD0_SET_REG, 1, 0, 0),
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.owner = ENTRY(0) | ENTRY(2),
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},
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[1] = {
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.config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_ETM_LINK(0x01),
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SOC_ETM_CH_ENA_AD1_REG, SOC_ETM_CH_ENA_AD1_SET_REG, 1, 0, 0),
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.owner = ENTRY(0) | ENTRY(2),
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},
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// backup stage: save configuration registers
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// restore stage: restore the configuration registers
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[2] = {
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.config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_ETM_LINK(0x02),
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SOC_ETM_CH0_EVT_ID_REG, SOC_ETM_CH0_EVT_ID_REG, ETM_RETENTION_REGS_CNT, 0, 0),
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.owner = ENTRY(0) | ENTRY(2),
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},
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};
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const soc_etm_retention_desc_t soc_etm_retention_info[1] = {
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[0] = {
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.module = SLEEP_RETENTION_MODULE_ETM0,
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.regdma_entry_array = etm_regdma_entries,
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.array_size = ARRAY_SIZE(etm_regdma_entries)
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},
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};
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@@ -19,10 +19,6 @@
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#define _SOC_CAPS_PCNT_CHANS_PER_UNIT 2 // Number of channels in each PCNT unit
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#define _SOC_CAPS_PCNT_THRES_POINT_PER_UNIT 2 // Number of threshold points in each PCNT unit
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/*--------------------------- ETM (Event Task Matrix) ----------------------------*/
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#define _SOC_CAPS_ETM_INST_NUM 1 // Number of ETM instances
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#define _SOC_CAPS_ETM_CHANS_PER_INST 50 // Number of channels in each ETM instance
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/*------------------------------- I2S ---------------------------------------*/
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// helper macros to access module attributes
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#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances
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@@ -1,48 +0,0 @@
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/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include "soc/gpio_sig_map.h"
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#include "soc/interrupts.h"
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#include "soc/usb_periph.h"
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/* -------------------------------- Private --------------------------------- */
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static const usb_otg_signal_conn_t otg_signals = {
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// Inputs
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.iddig = USB_OTG_IDDIG_IN_IDX,
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.avalid = USB_OTG_AVALID_IN_IDX,
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.bvalid = USB_SRP_BVALID_IN_IDX,
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.vbusvalid = USB_OTG_VBUSVALID_IN_IDX,
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.sessend = USB_SRP_SESSEND_IN_IDX,
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// Outputs
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.idpullup = USB_OTG_IDPULLUP_OUT_IDX,
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.dppulldown = USB_OTG_DPPULLDOWN_OUT_IDX,
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.dmpulldown = USB_OTG_DMPULLDOWN_OUT_IDX,
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.drvvbus = USB_OTG_DRVVBUS_OUT_IDX,
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.chrgvbus = USB_SRP_CHRGVBUS_OUT_IDX,
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.dischrgvbus = USB_SRP_DISCHRGVBUS_OUT_IDX,
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};
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static const usb_internal_phy_io_t internal_phy_io = {
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.dp = 21,
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.dm = 22,
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};
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/* --------------------------------- Public --------------------------------- */
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const usb_dwc_info_t usb_dwc_info = {
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.controllers = {
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[0] = {
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.fsls_signals = NULL,
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.otg_signals = &otg_signals,
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.internal_phy_io = &internal_phy_io,
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.supported_phys = USB_PHY_INST_FSLS_INTERN_0,
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.irq = ETS_USB_OTG11_INTR_SOURCE,
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.irq_2nd_cpu = -1,
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},
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},
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};
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