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refactor(lcdcam): move shared core clock setup to drivers

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Configure the shared LCDCAM core clock through guarded LCD and CAM LL APIs,
and unify LCD functional clock LL calls around group IDs across supported targets.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
morris
2026-09-08 14:47:41 +08:00
co-authored by Cursor
parent 1fd26d0846
commit ef6b7b742f
9 changed files with 183 additions and 52 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hal_lcd/esp32p4/include/hal/lcd_ll.h
+6 -4
View File
@@ -125,11 +125,12 @@ static inline void lcd_ll_enable_clock(lcd_cam_dev_t *dev, bool en)
/**
* @brief Select clock source for LCD peripheral
*
* @param dev LCD register base address
* @param group_id Group ID
* @param src Clock source
*/
static inline void lcd_ll_select_clk_src(lcd_cam_dev_t *dev, lcd_clock_source_t src)
static inline void lcd_ll_select_clk_src(int group_id, lcd_clock_source_t src)
{
(void)group_id;
switch (src) {
case LCD_CLK_SRC_XTAL:
HP_SYS_CLKRST.peri_clk_ctrl19.reg_lcd_clk_src_sel = 0;
@@ -157,14 +158,15 @@ static inline void lcd_ll_select_clk_src(lcd_cam_dev_t *dev, lcd_clock_source_t
/**
* @brief Set clock coefficient of LCD peripheral
*
* @param dev LCD register base address
* @param group_id Group ID
* @param div_num Integer part of the divider
* @param div_a denominator of the divider
* @param div_b numerator of the divider
*/
__attribute__((always_inline))
static inline void lcd_ll_set_group_clock_coeff(lcd_cam_dev_t *dev, int div_num, int div_a, int div_b)
static inline void lcd_ll_set_group_clock_coeff(int group_id, int div_num, int div_a, int div_b)
{
(void)group_id;
// lcd_clk = module_clock_src / (div_num + div_b / div_a)
HAL_ASSERT(div_num > 0 && div_num <= LCD_LL_CLK_FRAC_DIV_N_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl110, reg_lcd_clk_div_num, div_num - 1);
components/esp_hal_lcd/esp32s3/include/hal/lcd_ll.h
+6 -4
View File
@@ -103,11 +103,12 @@ static inline void lcd_ll_enable_clock(lcd_cam_dev_t *dev, bool en)
/**
* @brief Select clock source for LCD peripheral
*
* @param dev LCD register base address
* @param group_id Group ID
* @param src Clock source
*/
static inline void lcd_ll_select_clk_src(lcd_cam_dev_t *dev, lcd_clock_source_t src)
static inline void lcd_ll_select_clk_src(int group_id, lcd_clock_source_t src)
{
lcd_cam_dev_t *dev = LCD_LL_GET_HW(group_id);
switch (src) {
case LCD_CLK_SRC_PLL160M:
dev->lcd_clock.lcd_clk_sel = 3;
@@ -129,14 +130,15 @@ static inline void lcd_ll_select_clk_src(lcd_cam_dev_t *dev, lcd_clock_source_t
/**
* @brief Set clock coefficient of LCD peripheral
*
* @param dev LCD register base address
* @param group_id Group ID
* @param div_num Integer part of the divider
* @param div_a denominator of the divider
* @param div_b numerator of the divider
*/
__attribute__((always_inline))
static inline void lcd_ll_set_group_clock_coeff(lcd_cam_dev_t *dev, int div_num, int div_a, int div_b)
static inline void lcd_ll_set_group_clock_coeff(int group_id, int div_num, int div_a, int div_b)
{
lcd_cam_dev_t *dev = LCD_LL_GET_HW(group_id);
// lcd_clk = module_clock_src / (div_num + div_b / div_a)
HAL_ASSERT(div_num >= 2 && div_num <= LCD_LL_CLK_FRAC_DIV_N_MAX);
// dic_num == 0 means LCD_LL_CLK_FRAC_DIV_N_MAX divider in hardware
components/esp_hal_lcd/esp32s31/include/hal/lcd_ll.h
+62 -8
View File
@@ -69,7 +69,7 @@ typedef enum {
* @param group_id Group ID
* @param enable true to enable, false to disable
*/
static inline void lcd_ll_enable_bus_clock(int group_id, bool enable)
static inline void _lcd_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
// the core clock is a shared clock for both LCD and CAM
@@ -82,7 +82,7 @@ static inline void lcd_ll_enable_bus_clock(int group_id, bool enable)
/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
#define lcd_ll_enable_bus_clock(...) do { \
(void)__DECLARE_RCC_RC_ATOMIC_ENV; \
lcd_ll_enable_bus_clock(__VA_ARGS__); \
_lcd_ll_enable_bus_clock(__VA_ARGS__); \
} while(0)
/**
@@ -106,6 +106,60 @@ static inline void _lcd_ll_reset_register(int group_id)
_lcd_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
* @brief Select shared core clock source for LCDCAM peripheral
*
* @param group_id Group ID
* @param src Core clock source
*/
static inline void _lcd_ll_select_core_clk_src(int group_id, soc_periph_lcd_core_clk_src_t src)
{
(void)group_id;
switch (src) {
case LCD_CORE_CLK_SRC_XTAL:
HP_SYS_CLKRST.lcdcam_lcdcam_ctrl0.reg_lcdcam_clk_src_sel = 0;
break;
case LCD_CORE_CLK_SRC_PLL120M:
HP_SYS_CLKRST.lcdcam_lcdcam_ctrl0.reg_lcdcam_clk_src_sel = 1;
break;
case LCD_CORE_CLK_SRC_APLL:
HP_SYS_CLKRST.lcdcam_lcdcam_ctrl0.reg_lcdcam_clk_src_sel = 2;
break;
default:
HP_SYS_CLKRST.lcdcam_lcdcam_ctrl0.reg_lcdcam_clk_src_sel = 3;
break;
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
#define lcd_ll_select_core_clk_src(...) do { \
(void)__DECLARE_RCC_RC_ATOMIC_ENV; \
_lcd_ll_select_core_clk_src(__VA_ARGS__); \
} while(0)
/**
* @brief Set shared core clock divider for LCDCAM peripheral
*
* @param group_id Group ID
* @param div_num Integer part of the divider
* @param div_a Denominator of the fractional part; set to 0 to disable fractional division
* @param div_b Numerator of the fractional part; set to 0 to disable fractional division
*/
static inline void _lcd_ll_set_core_clock_divider(int group_id, uint32_t div_num, uint32_t div_a, uint32_t div_b)
{
(void)group_id;
HAL_ASSERT(div_num > 0 && div_num <= LCD_LL_CLK_FRAC_DIV_N_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.lcdcam_lcdcam_ctrl0, reg_lcdcam_clk_div_num, div_num - 1);
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.lcdcam_lcdcam_ctrl0, reg_lcdcam_clk_div_denominator, div_a);
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.lcdcam_lcdcam_ctrl0, reg_lcdcam_clk_div_numerator, div_b);
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
#define lcd_ll_set_core_clock_divider(...) do { \
(void)__DECLARE_RCC_RC_ATOMIC_ENV; \
_lcd_ll_set_core_clock_divider(__VA_ARGS__); \
} while(0)
/**
* @brief Enable clock gating
*
@@ -121,12 +175,12 @@ static inline void lcd_ll_enable_clock(lcd_cam_dev_t *dev, bool en)
/**
* @brief Select clock source for LCD peripheral
*
* @param dev LCD register base address
* @param group_id Group ID
* @param src Clock source
*/
static inline void lcd_ll_select_clk_src(lcd_cam_dev_t *dev, lcd_clock_source_t src)
static inline void lcd_ll_select_clk_src(int group_id, lcd_clock_source_t src)
{
(void)dev;
(void)group_id;
switch (src) {
case LCD_CLK_SRC_XTAL:
HP_SYS_CLKRST.lcdcam_lcd_ctrl0.reg_lcd_clk_src_sel = 0;
@@ -147,15 +201,15 @@ static inline void lcd_ll_select_clk_src(lcd_cam_dev_t *dev, lcd_clock_source_t
/**
* @brief Set clock coefficient of LCD peripheral
*
* @param dev LCD register base address
* @param group_id Group ID
* @param div_num Integer part of the divider
* @param div_a denominator of the divider
* @param div_b numerator of the divider
*/
__attribute__((always_inline))
static inline void lcd_ll_set_group_clock_coeff(lcd_cam_dev_t *dev, int div_num, int div_a, int div_b)
static inline void lcd_ll_set_group_clock_coeff(int group_id, int div_num, int div_a, int div_b)
{
(void)dev;
(void)group_id;
// lcd_clk = module_clock_src / (div_num + div_b / div_a)
HAL_ASSERT(div_num > 0 && div_num <= LCD_LL_CLK_FRAC_DIV_N_MAX);
HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.lcdcam_lcd_ctrl0, reg_lcd_clk_div_num, div_num - 1);